BOOTH RECODED WALLACE TREE MULTIPLIER USING NAND BASED DIGITALLY CONTROLLED DELAY LINES

ABSTRACT Digital controlled delay line (DCDL) is a digital circuit used to provide the desired delay for a circuit whose delay line is controlled by a digital control word. There are wide varieties of approaches available for constructing the DCDL. The previous approach deals about designing a DCDL with and without glitches. More over Glitches are the most considerable factor that limits the use of DCDL in many applications. The Glitches in a circuit can be analyzed by increasing delay control code in a circuit. By reducing the number of glitches a delay line also further reduced. . In this paper NAND based DCDL improved using Wallace tree multiplier, which used to give an accurate value, as well increase speed of operation. It aims at additional reduction of latency and area of the Wallace tree multiplier using the delay control units based on the DCDL unit. The simulation have been carried out using modelsim and xilinx tools