274 research outputs found

    Thermionic charge transport in CMOS nano-transistors

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    We report on DC and microwave electrical transport measurements in silicon-on-insulator CMOS nano-transistors at low and room temperature. At low source-drain voltage, the DC current and RF response show signs of conductance quantization. We attribute this to Coulomb blockade resulting from barriers formed at the spacer-gate interfaces. We show that at high bias transport occurs thermionically over the highest barrier: Transconductance traces obtained from microwave scattering-parameter measurements at liquid helium and room temperature is accurately fitted by a thermionic model. From the fits we deduce the ratio of gate capacitance and quantum capacitance, as well as the electron temperature

    Charge dynamics and spin blockade in a hybrid double quantum dot in silicon

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    Electron spin qubits in silicon, whether in quantum dots or in donor atoms, have long been considered attractive qubits for the implementation of a quantum computer due to the semiconductor vacuum character of silicon and its compatibility with the microelectronics industry. While donor electron spins in silicon provide extremely long coherence times and access to the nuclear spin via the hyperfine interaction, quantum dots have the complementary advantages of fast electrical operations, tunability and scalability. Here we present an approach to a novel hybrid double quantum dot by coupling a donor to a lithographically patterned artificial atom. Using gate-based rf reflectometry, we probe the charge stability of this double quantum dot system and the variation of quantum capacitance at the interdot charge transition. Using microwave spectroscopy, we find a tunnel coupling of 2.7 GHz and characterise the charge dynamics, which reveals a charge T2* of 200 ps and a relaxation time T1 of 100 ns. Additionally, we demonstrate spin blockade at the inderdot transition, opening up the possibility to operate this coupled system as a singlet-triplet qubit or to transfer a coherent spin state between the quantum dot and the donor electron and nucleus.Comment: 6 pages, 4 figures, supplementary information (3 pages, 4 figures

    Scaling silicon-based quantum computing using CMOS technology: State-of-the-art, Challenges and Perspectives

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    Complementary metal-oxide semiconductor (CMOS) technology has radically reshaped the world by taking humanity to the digital age. Cramming more transistors into the same physical space has enabled an exponential increase in computational performance, a strategy that has been recently hampered by the increasing complexity and cost of miniaturization. To continue achieving significant gains in computing performance, new computing paradigms, such as quantum computing, must be developed. However, finding the optimal physical system to process quantum information, and scale it up to the large number of qubits necessary to build a general-purpose quantum computer, remains a significant challenge. Recent breakthroughs in nanodevice engineering have shown that qubits can now be manufactured in a similar fashion to silicon field-effect transistors, opening an opportunity to leverage the know-how of the CMOS industry to address the scaling challenge. In this article, we focus on the analysis of the scaling prospects of quantum computing systems based on CMOS technology.Comment: Comments welcom

    Pipeline quantum processor architecture for silicon spin qubits

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    Noisy intermediate-scale quantum (NISQ) devices seek to achieve quantum advantage over classical systems without the use of full quantum error correction. We propose a NISQ processor architecture using a qubit `pipeline' in which all run-time control is applied globally, reducing the required number and complexity of control and interconnect resources. This is achieved by progressing qubit states through a layered physical array of structures which realise single and two-qubit gates. Such an approach lends itself to NISQ applications such as variational quantum eigensolvers which require numerous repetitions of the same calculation, or small variations thereof. In exchange for simplifying run-time control, a larger number of physical structures is required for shuttling the qubits as the circuit depth now corresponds to an array of physical structures. However, qubit states can be `pipelined' densely through the arrays for repeated runs to make more efficient use of physical resources. We describe how the qubit pipeline can be implemented in a silicon spin-qubit platform, to which it is well suited to due to the high qubit density and scalability. In this implementation, we describe the physical realisation of single and two qubit gates which represent a universal gate set that can achieve fidelities of F0.9999\mathcal{F} \geq 0.9999, even under typical qubit frequency variations.Comment: 21 pages (13 for main + 8 for supplement), 9 figures (4 for main + 5 for supplement

    Alternative fast quantum logic gates using nonadiabatic Landau-Zener-St\"{u}ckelberg-Majorana transitions

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    A conventional realization of quantum logic gates and control is based on resonant Rabi oscillations of the occupation probability of the system. This approach has certain limitations and complications, like counter-rotating terms. We study an alternative paradigm for implementing quantum logic gates based on Landau-Zener-St\"{u}ckelberg-Majorana (LZSM) interferometry with non-resonant driving and the alternation of adiabatic evolution and non-adiabatic transitions. Compared to Rabi oscillations, the main differences are a non-resonant driving frequency and a small number of periods in the external driving. We explore the dynamics of a multilevel quantum system under LZSM drives and optimize the parameters for increasing single- and two-qubit gates speed. We define the parameters of the external driving required for implementing some specific gates using the adiabatic-impulse model. The LZSM approach can be applied to a large variety of multi-level quantum systems and external driving, providing a method for implementing quantum logic gates on them.Comment: 15 pages, 12 figure

    Gate-based spin readout of hole quantum dots with site-dependent gg-factors

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    The rapid progress of hole spin qubits in group IV semiconductors has been driven by their potential for scalability. This is owed to the compatibility with industrial manufacturing standards, as well as the ease of operation and addressability via all-electric drives. However, owing to a strong spin-orbit interaction, these systems present variability and anisotropy in key qubit control parameters such as the Land\'e gg-factor, requiring careful characterisation for reliable qubit operation. Here, we experimentally investigate a hole double quantum dot in silicon by carrying out spin readout with gate-based reflectometry. We show that characteristic features in the reflected phase signal arising from magneto-spectroscopy convey information on site-dependent gg-factors in the two dots. Using analytical modeling, we extract the physical parameters of our system and, through numerical calculations, we extend the results to point out the prospect of conveniently extracting information about the local gg-factors from reflectometry measurements.Comment: Main manuscript: 12 pages, 8 figures. Supplementary Information: 3 pages, 2 figure
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