HAQ: Hardware-Aware Automated Quantization with Mixed Precision

Model quantization is a widely used technique to compress and accelerate deep neural network (DNN) inference. Emergent DNN hardware accelerators begin to support mixed precision (1-8 bits) to further improve the computation efficiency, which raises a great challenge to find the optimal bitwidth for each layer: it requires domain experts to explore the vast design space trading off among accuracy, latency, energy, and model size, which is both time-consuming and sub-optimal. Conventional quantization algorithm ignores the different hardware architectures and quantizes all the layers in a uniform way. In this paper, we introduce the Hardware-Aware Automated Quantization (HAQ) framework which leverages the reinforcement learning to automatically determine the quantization policy, and we take the hardware accelerator's feedback in the design loop. Rather than relying on proxy signals such as FLOPs and model size, we employ a hardware simulator to generate direct feedback signals (latency and energy) to the RL agent. Compared with conventional methods, our framework is fully automated and can specialize the quantization policy for different neural network architectures and hardware architectures. Our framework effectively reduced the latency by 1.4-1.95x and the energy consumption by 1.9x with negligible loss of accuracy compared with the fixed bitwidth (8 bits) quantization. Our framework reveals that the optimal policies on different hardware architectures (i.e., edge and cloud architectures) under different resource constraints (i.e., latency, energy and model size) are drastically different. We interpreted the implication of different quantization policies, which offer insights for both neural network architecture design and hardware architecture design.Comment: CVPR 2019. The first three authors contributed equally to this work. Project page: https://hanlab.mit.edu/projects/haq

A compreensão da expressão da negação por aprendentes chineses de PLE

Pretende-se com a presente dissertação estudar o modo como as diversas formas de exprimir a negação em português são assimiladas pelos aprendentes chineses universitários de português como língua estrangeira ao longo do seu percurso de aprendizagem. O estudo parte do pressuposto de que a negação é, em geral, um conteúdo pouco valorizado e deficientemente trabalhado no ensino do português como língua não materna, mesmo quando estão em causa duas línguas tão apartadas como o português, língua alvo e o chinês, língua materna. Este pressuposto é confirmado no estudo (cap.3 da presente dissertação) sobre a presença da expressão da negação em três dos principais manuais de ensino de PLE na China. Reforçando a pouca visibilidade do tópico, a própria bibliografia em linguística aplicada é escassa e tende tratar a natureza linguística da expressão, desvalorizando as restantes componentes. Em línguas (e culturas) tão afastadas quanto o português e o chinês, o fator intercultural é relevante sempre que alguém se propõe aprender uma delas. O presente estudo parte de uma apreciação tanto contrastiva quanto possível da expressão da negação em português e mandarim, pondo em evidência os pontos de contato e de afastamento entre as duas línguas e analisando a negação do ponto de vista das diversas tipologias. O critério de seleção das tipologias tem em conta os conteúdos de dois estudos de natureza distinta; por um lado, da Gramática do Português de Raposo et al, publicada em 2013; por outro lado, do Halliday’s Introduction to Functional Grammar de Halliday, publicado em 2014. Para apreciar as principais dificuldades de compreensão dos alunos chineses de PLE em textos marcados por polaridade negativa foi realizado um inquérito extensivo a aprendentes de todos os níveis de língua, com e sem tempo de permanência num país de língua portuguesa. A análise dos dados do inquérito/teste de compreensão da negação revela dados significativos das dificuldades que a expressão da negação apresenta aos aprendentes, designadamente, a componente implícita do enunciado negativo e a compreensão dos fatores contextuais e pragmáticos envolvidos. Estas conclusões habilitam o estudo a propor sugestões informadas para o ensino da expressão da negação em PLE.This dissertation aims to study how the different ways of expressing negation in Portuguese are assimilated by Chinese university students of Portuguese as a foreign language throughout their learning process. The study is based on the assumption that negation is, in general, an underrated content and it is poorly taught in the teaching of Portuguese as a non-native language, even with two languages as distant as Portuguese, the target language, and Chinese, the mother tongue, are involved. This assumption is confirmed in the study (Chapter.3 of this dissertation) about the presence of negation expression in three of the main textbooks for teaching Portuguese as a Foreign Language in China. Reinforcing the low frequency of the topic, the bibliography in applied linguistics itself is scarce and tends to treat the linguistic nature of the expression, devaluing the other components. In languages (and cultures) as distant as Portuguese and Chinese, the intercultural factor is relevant whenever someone proposes to learn one of them. The present study is based on a contrastive assessment of the expression of negation in Portuguese and Mandarin, highlighting the points of contact and distance between the two languages and analyzing negation from the point of view of several typologies. The criterion for the selection of typologies takes into account the contents of two studies of distinct nature; on one hand, from Gramática do Português by Raposo et al, published in 2013; on the other hand, from Halliday's Introduction to Functional Grammar by Halliday, published in 2014. To appreciate the main comprehension difficulties of Chinese PFL students in marked texts by negative polarity, an extensive survey was conducted among students of all language levels, with and without time spent in a Portuguese-speaking country. The analysis of the data from the survey/test on negation comprehension reveals significant data on the difficulties that negation expression presents to students, namely the implicit component of the negative utterance and the understanding of the contextual and pragmatic factors involved. These findings enable the study to propose informed suggestions for teaching the expression of negation in PFL

TARGeT: a web-based pipeline for retrieving and characterizing gene and transposable element families from genomic sequences

Gene families compose a large proportion of eukaryotic genomes. The rapidly expanding genomic sequence database provides a good opportunity to study gene family evolution and function. However, most gene family identification programs are restricted to searching protein databases where data are often lagging behind the genomic sequence data. Here, we report a user-friendly web-based pipeline, named TARGeT (Tree Analysis of Related Genes and Transposons), which uses either a DNA or amino acid ‘seed’ query to: (i) automatically identify and retrieve gene family homologs from a genomic database, (ii) characterize gene structure and (iii) perform phylogenetic analysis. Due to its high speed, TARGeT is also able to characterize very large gene families, including transposable elements (TEs). We evaluated TARGeT using well-annotated datasets, including the ascorbate peroxidase gene family of rice, maize and sorghum and several TE families in rice. In all cases, TARGeT rapidly recapitulated the known homologs and predicted new ones. We also demonstrated that TARGeT outperforms similar pipelines and has functionality that is not offered elsewhere

Single-Copy Certification of Two-Qubit Gates without Entanglement

A quantum state transformation can be generally approximated by single- and two-qubit gates. This, however, does not hold with noisy intermediate-scale quantum technologies due to the errors appearing in the gate operations, where errors of two-qubit gates such as controlled-NOT and SWAP operations are dominated. In this work, we present a cost efficient single-copy certification for a realization of a two-qubit gate in the presence of depolarization noise, where it is aimed to identify if the realization is noise-free, or not. It is shown that entangled resources such as entangled states and a joint measurement are not necessary for the purpose, i.e., a noise-free two-qubit gate is not needed to certify an implementation of a two-qubit gate. A proof-of-principle demonstration is presented with photonic qubits.Comment: 8 pages. arXiv admin note: text overlap with arXiv:1812.0208

Hardware-Centric AutoML for Mixed-Precision Quantization

Model quantization is a widely used technique to compress and accelerate deep neural network (DNN) inference. Emergent DNN hardware accelerators begin to support mixed precision (1-8 bits) to further improve the computation efficiency, which raises a great challenge to find the optimal bitwidth for each layer: it requires domain experts to explore the vast design space trading off among accuracy, latency, energy, and model size, which is both time-consuming and sub-optimal. Conventional quantization algorithm ignores the different hardware architectures and quantizes all the layers in a uniform way. In this paper, we introduce the Hardware-Aware Automated Quantization (HAQ) framework which leverages the reinforcement learning to automatically determine the quantization policy, and we take the hardware accelerator's feedback in the design loop. Rather than relying on proxy signals such as FLOPs and model size, we employ a hardware simulator to generate direct feedback signals (latency and energy) to the RL agent. Compared with conventional methods, our framework is fully automated and can specialize the quantization policy for different neural network architectures and hardware architectures. Our framework effectively reduced the latency by 1.4-1.95x and the energy consumption by 1.9x with negligible loss of accuracy compared with the fixed bitwidth (8 bits) quantization. Our framework reveals that the optimal policies on different hardware architectures (i.e., edge and cloud architectures) under different resource constraints (i.e., latency, energy, and model size) are drastically different. We interpreted the implication of different quantization policies, which offer insights for both neural network architecture design and hardware architecture design.Comment: Journal preprint of arXiv:1811.08886 (IJCV, 2020). The first three authors contributed equally to this work. Project page: https://hanlab.mit.edu/projects/haq