H-ORAM: A Cacheable ORAM Interface for Efficient I/O Accesses

Oblivious RAM (ORAM) is an effective security primitive to prevent access pattern leakage. By adding redundant memory accesses, ORAM prevents attackers from revealing the patterns in the access sequences. However, ORAM tends to introduce a huge degradation on the performance. With growing address space to be protected, ORAM has to store the majority of data in the lower level storage, which further degrades the system performance. In this paper, we propose Hybrid ORAM (H-ORAM), a novel ORAM primitive to address large performance degradation when overflowing the user data to storage. H-ORAM consists of a batch scheduling scheme for enhancing the memory bandwidth usage, and a novel ORAM interface that returns data without waiting for the I/O access each time. We evaluate H-ORAM on a real machine implementation. The experimental results show that that H-ORAM outperforms the state-of-the-art Path ORAM by 19.8x for a small data set and 22.9x for a large data set

Using steered molecular dynamics to predict and assess Hsp70 substrate-binding domain mutants that alter prion propagation.

Genetic screens using Saccharomyces cerevisiae have identified an array of cytosolic Hsp70 mutants that are impaired in the ability to propagate the yeast [PSI(+)] prion. The best characterized of these mutants is the Ssa1 L483W mutant (so-called SSA1-21), which is located in the substrate-binding domain of the protein. However, biochemical analysis of some of these Hsp70 mutants has so far failed to provide major insight into the specific functional changes in Hsp70 that cause prion impairment. In order to gain a better understanding of the mechanism of Hsp70 impairment of prions we have taken an in silico approach and focused on the Escherichia coli Hsp70 ortholog DnaK. Using steered molecular dynamics simulations (SMD) we demonstrate that DnaK variant L484W (analogous to SSA1-21) is predicted to bind substrate more avidly than wild-type DnaK due to an increase in numbers of hydrogen bonds and hydrophobic interactions between chaperone and peptide. Additionally the presence of the larger tryptophan side chain is predicted to cause a conformational change in the peptide-binding domain that physically impairs substrate dissociation. The DnaK L484W variant in combination with some SSA1-21 phenotypic second-site suppressor mutations exhibits chaperone-substrate interactions that are similar to wild-type protein and this provides a rationale for the phenotypic suppression that is observed. Our computational analysis fits well with previous yeast genetics studies regarding the functionality of the Ssa1-21 protein and provides further evidence suggesting that manipulation of the Hsp70 ATPase cycle to favor the ADP/substrate-bound form impairs prion propagation. Furthermore, we demonstrate how SMD can be used as a computational tool for predicting Hsp70 peptide-binding domain mutants that impair prion propagation

The design and implementation of compression techniques for profile guided compilation

Advances in program profiling techniques have led to advances in compiler optimization techniques, and vice versa. This dissertation makes contributions in the areas of program profiling as well as profile-guided optimizations. More specifically, it designs and evaluates a new compressed representation for profile data such that profile guided optimizations can benefit from it. A type-based value profiling technique is also developed such that new data compression techniques can be designed to exploit value redundancy present in program data. A timestamped whole program path (TWPP+) representation is proposed to compress program traces which contain both control flow and memory address information. Instead of considering a trace as a stream of symbols, TWPP+ divides a complete trace into a control flow trace part and a memory dependence trace part; each part is then reorganized to allow fast retrieval of information during data flow analyses. Execution profiles can thus be integrated to help a broad range of compiler analyses and optimizations. Three different applications are shown to demonstrate the strength of this new representation. A type-based value profiling framework is developed to help identify redundancy in data values and thus design new data compression techniques for improving memory behavior. Two types of redundancies are identified in representations of small values and pointer addresses respectively. Both software and hardware approaches are proposed and evaluated to exploit these opportunities. The software approach through data compression transformations greatly reduces the memory footprint and speeds up the program executions with the help of six specially designed data compression instructions. The hardware approach employs compression to enable partial cache line prefetching resulting in consistent improvements in the program's execution time and reduction in memory traffic

Data Compression Transformations for Dynamically Allocated Data Structures

We introduce a class of transformations which modify the representation of dynamic data structures used in programs with the objective of compressing their sizes. We have developed the common prefix and narrow-data transformations that respectively compress a 32 bit address pointer and a 32 bit integer field into 15 bit entities. A pair of fields which have been compressed by the above compression transformations are packed together into a single 32 bit word. The above transformations are designed to apply to data structures that are partially compressible, that is, they compress portions of data structures to which transformations apply and provide a mechanism to handle the data that is not compressible. The accesses to compressed data are efficiently implemented by designing data compression extensions (DCX) to the processor's instruction set. We have observed average reductions in heap allocated storage of 25% and average reductions in execution time and power consumption of 30%. If DCX support is not provided the reductions in execution times fall from 30% to 12.5%

An Efficient Code Update Scheme for DSP Applications in Mobile Embedded Systems

DSP processors usually provide dedicated address generation units (AGUs) to assist address computation. By carefully allocating variables in the memory, DSP compilers take advantage of AGUs and generate efficient code with compact size and improved performance. However, DSP applications running on mobile embedded systems often need to be updated after their initial releases. Studies showed that small changes at the source code level may significantly change the variable layout in the memory and thus the binary code, which causes large energy overheads to mobile embedded systems that patch through wireless or satellite communication, and often pecuniary burden to the users. In this paper, we propose an update-conscious code update scheme to effectively reduce patch size. It first performs incremental offset assignment based on a recent variable coalescing heuristic, and then summarizes the code difference using two types of update primitives. Our experimental results showed that using updateconscious code update can greatly improve code similarity and thus reduce the update script sizes