Characterization of the Burst Stabilization Protocol for the RR/RR CICQ Switch

Input buffered switches with Virtual Output Queueing (VOQ) can be unstable when presented with unbalanced loads. Existing scheduling algorithms, including iSLIP for Input Queued (IQ) switches and Round Robin (RR) for Combined Input and Crossbar Queued (CICQ) switches, exhibit instability for some schedulable loads. We investigate the use of a queue length threshold and bursting mechanism to achieve stability without requiring internal speed-up. An analytical model is developed to prove that the burst stabilization protocol achieves stability and to predict the minimum burst value needed as a function of offered load. The analytical model is shown to have very good agreement with simulation results. These results show the advantage of the RR/RR CICQ switch as a contender for the next generation of high-speed switches.Comment: Presented at the 28th Annual IEEE Conference on Local Computer Networks (LCN), Bonn/Konigswinter, Germany, Oct 20-24, 200

Evaluation and Analysis of Distributed Graph-Parallel Processing Frameworks

A number of graph-parallel processing frameworks have been proposed to address the needs of processing complex and large-scale graph structured datasets in recent years. Although significant performance improvement made by those frameworks were reported, comparative advantages of each of these frameworks over the others have not been fully studied, which impedes the best utilization of those frameworks for a specific graph computing task and setting. In this work, we conducted a comparison study on parallel processing systems for large-scale graph computations in a systematic manner, aiming to reveal the characteristics of those systems in performing common graph algorithms with real-world datasets on the same ground. We selected three popular graph-parallel processing frameworks (Giraph, GPS and GraphLab) for the study and also include a representative general data-parallel computing system— Spark—in the comparison in order to understand how well a general data-parallel system can run graph problems. We applied basic performance metrics measuring speed, resource utilization, and scalability to answer a basic question of which graph-parallel processing platform is better suited for what applications and datasets. Three widely-used graph algorithms— clustering coefficient, shortest path length, and PageRank score—were used for benchmarking on the targeted computing systems.We ran those algorithms against three real world network datasets with diverse characteristics and scales on a research cluster and have obtained a number of interesting observations. For instance, all evaluated systems showed poor scalability (i.e., the runtime increases with more computing nodes) with small datasets likely due to communication overhead. Further, out of the evaluated graphparallel computing platforms, PowerGraph consistently exhibits better performance than others

The up-regulation of Myb may help mediate EGCG inhibition effect on mouse lung adenocarcinoma

The mRNAs significantly regulated by EGCG in the NNK-induced A/J mouse lung tumor. (36kb xlsx

Rate-based flow-control for the CICQ switch

A combined input and crosspoint queued (CICQ) switch with a flow control latency of round-trip time (RTT) packets requires each crosspoint (CP) buffer to hold the RTT packets in order to support any traffic pattern without blocking. In this paper, a distributed rate-based flow control internal to a CICQ switch is proposed. The new rate-based flow control allocates bandwidth to each virtual output queue (VOQ) using simple counters, and a minimal CP buffer requirement can be achieved without packet loss. The proposed rate-based flow control is shown to be more stable than the existing credit-based flow control previously proposed in the literature for realistic traffic while significantly reducing the CP memory size, thus making the implementation of a distributed CICQ switch practical

Threshold-based Exhaustive Round-Robin for the CICQ Switch with Virtual Crosspoint Queues

Abstract-A multi-cabinet implementation of a combined input and crosspoint queued (CICQ) switch introduces a large RTT latency between the line cards and switch fabric, making the crosspoint (CP) buffer requirement impractical. A virtual crosspoint queues (VCQs), proposed in literature are shared among a set of VOQs and CP buffers for the same input port, reducing minimal memory required inside the switch fabric. In this paper, a threshold-based exhaustive round-robin (T-ERR) is employed to improve the throughput of the CICQ switch with VCQs. T-ERR at VCQ and CP arbiters serve packets residing in a longer queue more aggressively than packet residing in a shorter queue. T-ERR is simple yet drastically increases throughput for the CICQ with small VCQ size. Simulation experiment with unbalanced traffic show that its throughput improves from 80 % to 94 % for CP size of 4 cells and 73 % to 83 % for CP size of 2 cells for RTT = 64 cell time. Furthermore, its throughput is independent of switch size and RTT. Thus, the proposed scheme makes the scalable implementation of a distributed CICQ switch practical. Index Terms – CICQ switches, flow control, scalability, and virtual crosspoint queues I

Design and Evaluation of the Combined Input and Crossbar Queued (CICQ) Switch

Packet switches are used in the Internet to forward information between a sender and receiver and are the critical bottleneck in the Internet. Without faster packet switch designs, the Internet cannot continue to scale-up to higher data rates. Packet switches must be able to achieve high throughput and low delay. In addition, they must be stable for all traffic loads, must efficiently support variable length packets, and must be scalable to higher link data rates and greater numbers of ports. This dissertation investigates a new combined input and crossbar queued (CICQ) switch architecture. Some unbalanced traffic loads result in instability for input queued (IQ) and CICQ switches. This instability region was modeled, and the cause of the instability was found to be a lack of work conservation at one port. A new burst stabilization protocol was investigated that was shown to stabilize both IQ and CICQ switches. As an added benefit, this new protocol did not require a costly internal switch speed-up. Switching variable length packets in IQ switches requires the segmentation of packets into cells. The process also requires an internal switch speed-up which can be costly. A new method of cell-merging in IQ switches reduced this speed-up. To improve fairness for CICQ switches, a block and transfer method was proposed and evaluated. Implementation feasibility of the CICQ switch was also investigated via a field programmable gate array (FPGA) implementation of key components. Two new designs for round robin arbiters were developed and evaluated. The first of these, a proposed priority-encoder-based round robin arbiter that uses feedback masking, has a lower delay than any known design for an FPGA implementation. The second, an overlapped round robin arbiter design that fully overlaps round robin polling and scheduling, was proposed and shown to be scalable, work conserving, and fair. To allow for multi-cabinet implementation and minimization of the size of the cross point buffers, a distributed input port queue scheduler was investigated. This new scheduler minimizes the amount of buffering needed within the crossbar. The two primary contributions of this dissertation are 1) a complete understanding of the performance characteristics of the CICQ switch, and 2) new methods for improving the performance, stability,and scalability of the CICQ switch. This work has shown that the CICQ switch can be the switch architecture of the future

Survey on Blockchain-Enhanced Machine Learning

The convergence of blockchain and Machine Learning (ML) promises to reshape technological innovation by enhancing security, efficiency, and transparency in ML systems. This survey explores the transformative potential of integrating these two technologies. We outline the foundational principles of blockchain and ML, clarifying their capabilities and synergies. We examine how blockchain strengthens ML as a secure, immutable platform for data sharing, model validation, and executing tasks. We emphasize the opportunities for heightened data security, improved model validation, and decentralized, privacy-preserving systems. However, challenges exist like scalability, energy-wise, and the need for new tailored consensus mechanisms. We provide insights based on recent research at this intersection. Additionally, we explore emerging trends and future directions, like blockchain’s application in federated learning for secure, transparent data sharing and model validation. We also investigate privacy-preserving systems such as Proof of Learning, where blockchain enables secure execution while maintaining data privacy. Moreover, we examine the potential for decentralized AI systems leveraging blockchain to deploy and execute models. This survey offers a comprehensive overview of the evolving landscape at the intersection of blockchain and ML, highlighting opportunities and challenges while suggesting future research directions