6 research outputs found
Universal Non-Polar Switching in Carbon-doped Transition Metal Oxides (TMOs) and Post TMOs
Transition metal oxides (TMOs) and post-TMOs (PTMOs), when doped with Carbon,
show non-volatile current-voltage (I-V) characteristics, which are both
universal and repeatable. We have shown spectroscopic evidence of the
introduction of carbon-based impurity states inside the existing larger bandgap
effectively creating a smaller bandgap which we suggest could enable Mott-like
correlation effect. Our findings indicate new insights for yet to be understood
unipolar and nonpolar resistive switching in the TMOs and PTMOs. We have shown
that device switching is not thermal-energy dependent and have developed an
electronic-dominated switching model that allows for the extreme temperature
operation (from 1.5 K to 423 K) and state retention up to 673 K for a 1-hour
bake. Importantly, we have optimized the technology in an industrial process
and demonstrated integrated 1-transistor/1-resistor (1T1R) arrays up to 1 kbit
with 47 nm devices on 300 mm wafers for advanced node CMOS-compatible
correlated electron RAM (CeRAM). These devices are shown to operate with 2 ns
write pulses and retain the memory states up to 200 C for 24 hours. The
collection of attributes shown, including scalability to state-of-the-art
dimensions, non-volatile operation to extreme low and high temperatures, fast
write, and reduced stochasticity as compared to filamentary memories such as
ReRAMs show the potential for a highly capable two-terminal back-end-of-line
non-volatile memory.Comment: 28 pages, 17 figures, accepted in APL Material
Simulation study of the impact of quantum confinement on the electrostatically driven oerformance of n-type nanowire transistors
In this paper, we have studied the impact of quantum confinement on the performance of n-type silicon nanowire transistors (NWTs) for application in advanced CMOS technologies. The 3-D drift-diffusion simulations based on the density gradient approach that has been calibrated with respect to the solution of the Schrödinger equation in 2-D cross sections along the direction of the transport are presented. The simulated NWTs have cross sections and dimensional characteristics representative of the transistors expected at a 7-nm CMOS technology. Different gate lengths, cross-sectional shapes, spacer thicknesses, and doping steepness were considered. We have studied the impact of the quantum corrections on the gate capacitance, mobile charge in the channel, drain-induced barrier lowering, and subthreshold slope. The mobile charge to gate capacitance ratio, which is an indicator of the intrinsic speed of the NWTs, is also investigated. We have also estimated the optimal gate length for different NWT design conditions
Performance and variability of doped multithreshold FinFETs for 10-nm CMOS
In this paper, by means of simulation, we have studied the implications of using channel doping to control the threshold voltage and the leakage current in bulk silicon FinFETs suitable for the 10-nm CMOS technology generation. The channel doping level of high-performance FinFETs designed for 100-nA/μm leakage current has been increased to achieve 10 and 1-nA/μm leakage currents. Ensemble Monte Carlo (EMC) simulations are used to estimate the impact of the increased doping on the transistor performance. Atomistic drift-diffusion simulations calibrated to the results of the EMC simulations are used to evaluate the impact of random discrete dopants, line edge roughness, and metal gate granularity on the statistical variability. The results of the statistical variability simulations are also used to highlight errors resulting from the use of continuous doping in the TCAD simulation of advanced CMOS technology generation FinFET