Unintended Consequences of Unemployment Insurance Benefits: The Role of Banks

We use disaggregated U.S. data and a border discontinuity design to show that more generous unemployment insurance (UI) policies lower bank deposits. We test several channels that could explain this decline and find evidence consistent with households lowering their deposit holdings due to reduced precautionary savings. Since deposits are the largest and most stable source of funding for banks, the decrease in deposits affects bank lending. Banks that raise deposits in states with generous UI policies reduce their loan supply to small businesses. Furthermore, counties that are served by these banks experience a higher unemployment rate and lower wage growth

Validation of CMOS Active Pixel Sensor with double readout rolling shutter architecture for charged particle tracking

International audienceRolling shutter readout is a classical architecture in CMOS Active Pixel Sensors (APS) usually well suited to reduce the power consumption in the active area of the sensor by activating only one row at a time for reset and readout operations. Its benefits are widely used from imaging sensors to high energy physics sensors where large sensing area and low power consumptions are an issue. In the field of high-energy physics and more specifically, answering the tracking requirements of the future ALICE Muon Forward Tracker (MFT), the rolling shutter readout system has been studied and improved to overcome the limitations of the classical readout speed, by using group of two rows selected simultaneously for the reset and readout operation. As a result of this study, an ASIC prototype, named M22THRB2, has been designed in a 0.18 μm quadruple-well CMOS Image Sensor (CIS) process to assess this architecture proposal. Laboratory tests have been performed on both the in-pixel analog signal processing part and on the analogue to digital converter part of the chip. Test results on pixel noise and analog response to X-ray source are presented in details. Pixels connected to discriminators (analog+digital parts of the chip) are also characterized in laboratory giving a complete system characterization on noise distribution, fake hit rate and pixels response uniformity

Validation of CMOS Active Pixel Sensor with double readout rolling shutter architecture for charged particle tracking

Rolling shutter readout is a classical architecture in CMOS Active Pixel Sensors (APS) usually well suited to reduce the power consumption in the active area of the sensor by activating only one row at a time for reset and readout operations. Its benefits are widely used from imaging sensors to high energy physics sensors where large sensing area and low power consumptions are an issue. In the field of high-energy physics and more specifically, answering the tracking requirements of the future ALICE Muon Forward Tracker (MFT), the rolling shutter readout system has been studied and improved to overcome the limitations of the classical readout speed, by using group of two rows selected simultaneously for the reset and readout operation. As a result of this study, an ASIC prototype, named M22THRB2, has been designed in a 0.18 μm quadruple-well CMOS Image Sensor (CIS) process to assess this architecture proposal. Laboratory tests have been performed on both the in-pixel analog signal processing part and on the analogue to digital converter part of the chip. Test results on pixel noise and analog response to X-ray source are presented in details. Pixels connected to discriminators (analog+digital parts of the chip) are also characterized in laboratory giving a complete system characterization on noise distribution, fake hit rate and pixels response uniformity

MiniCACTUS: Sub-100 ps timing with depleted MAPS

International audienceMiniCACTUS is a monolithic CMOS sensor demonstrator designed for time tagging individual Minimum Ionizing Particles with an accuracy better than 100ps. The sensor features an active array of 2 × 4 pixels surrounded by guard-rings used to bias the high-resistivity substrate, an analog and digital front-end per pixel, a slow control interface and internal programmable biases through DACs. The baseline pixel sizes are 1.0mm2 and 0.5mm2. The sensing element is a deep n-well/p-substrate diode without internal amplification. The analog front-ends and the discriminators for each pixel have been implemented outside the pixel, at the column level. After fabrication, the sensors have been thinned to 200µm and 100µm and then post-processed for backside biasing. As such, this sensor is a demonstrator chip for future large scale timing detectors, like upgrades of timing detectors at LHC, or future high energy physics detector projects. Measurements of noise, response to X and γ-rays are presented, as well as time resolution measurements using β decays from 90Sr. Some preliminary results from a test-beam campaign are also mentioned

MiniCACTUS: A 65 ps Time Resolution Depleted Monolithic CMOS Sensor

International audienceMiniCACTUS is a monolithic sensor prototype optimized for timing measurement of charged particles. It has been designed in a standard 150 nm CMOS process without dedicated amplification layer. It is intended as a demonstrator chip for future large-scale timing detectors, like upgrades of timing detectors at LHC, or future high-energy physics detector projects. The sensor features an active array of $2\times4$ diodes, analog and digital front-ends (FEs), a slow control interface, and bias circuitry programmable through internal DACs. The sensing element is a deep n-well/p-substrate diode. Thanks to the optimized guard-rings surrounding the whole chip, it is possible to apply safely more than −450 V on the high-resistivity substrate allowing fast charge collection. The baseline pixel dimensions are $1.0\times1.0$ mm and $0.5\times1.0$ mm. The analog FEs and the discriminators for each pixel are implemented outside the pixel, at the column level. The power consumption is approximately 300 mW/cm2, which is compatible with cooling infrastructure available at LHC experiments, and making integration of this concept viable in future high-energy physics experiments. After fabrication, the sensors have been thinned to 100, 200, and $300~\mu \text{m}$ total thickness and then postprocessed for backside biasing. The time resolution of several sensors with different thicknesses has been measured in three testbeam campaigns using high-energy muons minimum ionizing particles (MIPs) at CERN SPS in 2021 and 2022. A resolution of 65.3 ps has been measured with ON-chip FE and discriminator. This article will focus on the results of these testbeam campaigns

CAcTμ\muS: High-Voltage CMOS Monolithic Active Pixel Sensor for Tracking and Time Tagging of Charged Particles

International audienceThe increase of luminosity foreseen for the Phase-II HL-LHC upgrades calls for new solutions to fight against the expected pile-up effects. One approach is to measure very accurately the time of arrival of the particles with a resolution of a few tens of picoseconds. In addition, a spatial granularity better than a few millimeter will be needed to obtain a fake jet rejection rate acceptable for physics analysis. These goals could be achieved by using the intrinsic benefits of a standard High-Voltage CMOS technology – in conjunction with a high-resistivity detector material – leading to a fast, integrated, rad-hard, fully depleted monolithic active pixel sensor ASI