Memory management in the programming language ICL

This paper presents the issues involved in implementing the programming language ICL and some of the details of the implementation, with special emphasis on aspects of the data management system. While the structures and algorithms presented here apply to all implementations of ICL, they are particularly relevant to the VAX implementation. This report is not intended to serve as an introduction to programming in ICL nor as a comprehensive guide to its implementation

VLSI Concurrent Computation for Music Synthesis

This thesis presents a very large-scale integrated circuit (VLSI) approach to the generation of musical sounds. The approach allows the generation of rich musical sounds using models that are easy to control and have parameters corresponding to many of the physical attributes of musical instruments. The generality of the approach for music synthesis is demonstrated by presenting several primitive sound generation mechanisms. Utilizing these primitives, several musical instruments are assembled to produce struck, plucked, and blown sounds. Refinements of the instruments are easily accomplished by adjusting or rearranging different functional components. A concurrent computing engine supporting the sound generation mechanisms is presented along with details of its VLSI implementation. Involved in the implementation is a new CMOS design methodology. Several alternative architectures for the computing engine are also presented and studied

A VLSI Architecture for Sound Synthesis

No Abstract

Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs

Using FPGAs to accelerate ConvNets has attracted significant attention in recent years. However, FPGA accelerator design has not leveraged the latest progress of ConvNets. As a result, the key application characteristics such as frames-per-second (FPS) are ignored in favor of simply counting GOPs, and results on accuracy, which is critical to application success, are often not even reported. In this work, we adopt an algorithm-hardware co-design approach to develop a ConvNet accelerator called Synetgy and a novel ConvNet model called DiracDeltaNet$^{\dagger}$. Both the accelerator and ConvNet are tailored to FPGA requirements. DiracDeltaNet, as the name suggests, is a ConvNet with only $1\times 1$ convolutions while spatial convolutions are replaced by more efficient shift operations. DiracDeltaNet achieves competitive accuracy on ImageNet (88.7\% top-5), but with 42$\times$ fewer parameters and 48$\times$ fewer OPs than VGG16. We further quantize DiracDeltaNet's weights to 4-bit and activations to 4-bits, with less than 1\% accuracy loss. These quantizations exploit well the nature of FPGA hardware. In short, DiracDeltaNet's small model size, low computational OP count, low precision and simplified operators allow us to co-design a highly customized computing unit for an FPGA. We implement the computing units for DiracDeltaNet on an Ultra96 SoC system through high-level synthesis. Our accelerator's final top-5 accuracy of 88.1\% on ImageNet, is higher than all the previously reported embedded FPGA accelerators. In addition, the accelerator reaches an inference speed of 66.3 FPS on the ImageNet classification task, surpassing prior works with similar accuracy by at least 11.6$\times$.Comment: Update to the latest result

Probabilistic Fatigue Damage Prognosis Using a Surrogate Model Trained Via 3D Finite Element Analysis

Utilizing inverse uncertainty quantification techniques, structural health monitoring can be integrated with damage progression models to form probabilistic predictions of a structure's remaining useful life. However, damage evolution in realistic structures is physically complex. Accurately representing this behavior requires high-fidelity models which are typically computationally prohibitive. In the present work, a high-fidelity finite element model is represented by a surrogate model, reducing computation times. The new approach is used with damage diagnosis data to form a probabilistic prediction of remaining useful life for a test specimen under mixed-mode conditions