Visual notations for viewing RDF constraints with UnSHACLed

The quality of knowledge graphs can be assessed by a validation against specified constraints, typically use-case specific and modeled by human users in a manual fashion. Visualizations can improve the modeling process as they are specifically designed for human information processing, possibly leading to more accurate constraints, and in turn higher quality knowledge graphs. However, it is currently unknown how such visualizations support users when viewing RDF constraints as no scientific evidence for the visualizations' effectiveness is provided. Furthermore, some of the existing tools are likely suboptimal, as they lack support for edit operations or common constraints types. To establish a baseline, we have defined visual notations to represent RDF constraints and implemented them in UnSHACLed, a tool that is independent of a concrete RDF constraint language. In this paper, we (i) present two visual notations that support all SHACL core constraints, built upon the commonly used visualizations VOWL and UML, (ii) analyze both notations based on cognitive effective design principles, (iii) perform a comparative user study between both visual notations, and (iv) present our open source tool UnSHACLed incorporating our efforts. Users were presented RDF constraints in both visual notations and had to answer questions based on visualization task taxonomies. Although no statistical significant difference in mean error rates was observed, all study participants preferred ShapeVOWL in a self assessment to answer RDF constraint-related questions. Furthermore, ShapeVOWL adheres to more cognitive effective design principles according to our performed comparison. Study participants argued that the increased visual features of ShapeVOWL made it easier to spot constraints, but a list of constraints - as in ShapeUML - is easier to read. However, also that more deviations from the strict UML specification and introduction of more visual features can improve ShapeUML. From these findings we conclude that ShapeVOWL has a higher potential to represent RDF constraints more effective compared to ShapeUML. But also that the clear and efficient text encoding of ShapeUML can be improved with visual features. A one-size-fits-all approach to RDF constraint visualization and editing will be insufficient. Therefore, to support different audiences and use cases, user interfaces of RDF constraint editors need to support different visual notations

Lignin-First Monomers to Catechol: Rational Cleavage of C-O and C-C Bonds over Zeolites

A catalytic route is developed to synthesize bio-renewable catechol from softwood-derived lignin-first monomers. This process concept consists of two steps: 1) O-demethylation of 4-n-propylguaiacol (4-PG) over acidic beta zeolites in hot pressurized liquid water delivering 4-n-propylcatechol (4-PC); 2) gas-phase C-dealkylation of 4-PC providing catechol and propylene over acidic ZSM-5 zeolites in the presence of water. With large pore sized beta-19 zeolite as catalyst, 4-PC is formed with more than 93 % selectivity at nearly full conversion of 4-PG. The acid-catalyzed C-dealkylation over ZSM-5 zeolite with medium pore size gives a catechol yield of 75 %. Overall, around 70 % catechol yield is obtained from pure 4-PG, or 56 % when starting from crude 4-PG monomers obtained from softwood by lignin-first RCF biorefinery. The selective cleavage of functional groups from biobased platform molecules through a green and sustainable process highlights the potential to shift feedstock from fossil oil to biomass, providing drop ins for the chemicals industry

A fully-integrated method for RTN parameter extraction

A method for on-chip extraction of random telegraph noise (RTN) parameters from transistors is proposed. Exploiting the nature of exponential distributed RTN events, the proposed circuit enables the automatic extraction of mean RTN time constants from a large array of small-area transistors. The on-chip data processing provides a simplified measurement infrastructure, reduces the measurement time by parallelization and increased efficiency, reduces the data post-processing effort and extends the measurement frequency band. The methodology is demonstrated in a prototype chip fabricated in a 28nm High-k Metal Gate (HK/MG) CMOS technology. The 1.17 mm2 chip includes two arrays of 18,144 transistors each, analog circuitry for sensing and digitizing the RTN signals and a digital signal processing block. The experimental results agree with expectations.status: publishe