115 research outputs found

    Oximetry and Glucose Sensors A SMART SENSOR FOR BIOMEDICAL APPLICATIONS

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    Abstract Monolithic smart sensors for the voltammetric measurement of glucose or oxygen concentrations have been developed. Each smart sensor consists of a planar voltammetric sensor, a CMOS interface circuit and temperature sensor. The interface circuit and the temperature sensor are realised in a standard CMOS process. The sensor specific layers are added afterwards on the same chip with the CMOS compatible sensor technology developed for this purpose. Two versions of this smart sensor have been realised. The two electrode configuration with a Au working electrode has been implemented for the measurement of p02. The three electrode configuration with a Pt working electrode can measure glucose when an additional glucose oxidase membrane is applied on the electrodes. The interface circuit can apply voltages from +lV to -lV to the sensor and can handle sensor current ranges from 30 nA full scale to 1 pA full scale with a +/-2.5 V supply voltage. The temperature sensor has a sensitivity of 154 pV/K. The total dimensions of this smart sensor are 0.75 mm by 5 mm

    A CMOS Time to Digital Converter IC with 2 Level Analog CAM

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    A time to charge converter IC with an analog memory unit (TCCAMU) has been designed and fabricated in HP\u27s CMOS 1.2-µm n-well process. The TCCAMU is an event driven system designed for front end data acquisition in high energy physics experiments. The chip includes a time to charge converter, analog Level 1 and Level 2 associative memories for input pipelining and data filtering, and an A/D converter. The intervals measured and digitized range from 8-24 ns. Testing of the fabricated chip resulted in an LSB width of 107 ps, a typical differential nonlinearity of \u3c 35 ps, and a typical integral nonlinearity of \u3c 200 ps. The average power dissipation is 8.28 mW per channel. By counting the reference clock, a time resolution of 107 ps over ~ 1 s range could be realized

    The Differential Pair as a Triangle-Sine Wave Converter

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    R~/ RÃ bstract-The performance of a differential pair with emitter degeneration as a triangle-sine wave converter is analyzed. Equations describing the circuit operation are derived and solved both analytically and by computer. This allows selection of operating conditions for optimum performance such that total harmonic distortion as low as 0.2 percent "-has been measured. -vEE (a

    A CMOS time to digital converter IC with 2 level analog CAM

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    Childhood bullying, paranoid thinking, and the misappraisal of social threat: trouble at school

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    Background:Experiences of bullying predict the development of paranoia in school-age adolescents. While many instances of psychotic phenomena are transitory, maintained victimization can lead to increasingly distressing paranoid thinking. Furthermore, paranoid thinkers perceive threat in neutral social stimuli and are vigilant for environmental risk. Aims:The present paper investigated the association between different forms of bullying and paranoid thinking, and the extent to which school-age paranoid thinkers overestimate threat in interpersonal situations. Methods: Two hundred and thirty participants, aged between eleven and fourteen, were recruited from one secondary school in the UK. Participants completed a series of questionnaires hosted on the Bristol Online Survey tool. All data were collected in a classroom setting in quiet and standardized conditions. Results: A significant and positive relationship was found between experiences of bullying and paranoid thinking: greater severity of bullying predicted more distressing paranoid thinking. Further, paranoid thinking mediated the relationship between bullying and overestimation of threat in neutral social stimuli. Conclusion: Exposure to bullying is associated with distressing paranoid thinking and subsequent misappraisal of threat. As paranoid thinkers experience real and overestimated threat, the phenomena may persist

    Erratum: 1-V 140-μW 88-dB audio sigma-delta modulator in 90-nm CMOS (IEEE Journal of Solid-State Circuits (2004) 39: 11 (1809-1818))

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    10.1109/JSSC.2009.2033505IEEE Journal of Solid-State Circuits44113211-IJSC
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