A multi-channel optical plug-in module for gigabit data reception

A plug-in module has been built for reception of optically transmitted data by gigabit applications. The optical receiving module is based on a 12-channel optical receiver and an FPGA with embedded high-speed deserializers. It is compatible with the serializer ASIC used by many LHC systems. Due to its compact design, several of these modules could be plugged into VME readout systems. This module will be the principle element for both the CMS Preshower data concentrator card and the TOTEM front-end driver

A compact plug-in module for LHC-like trigger emulation

A compact trigger emulation module for evaluating electronic systems for LHC applications has been built using off-the-shelf components. The emulator, which is based on an FPGA, generates both programmable and true-random trigger patterns in compliance with the LHC triggering rules. For the true-random trigger part, the source of randomness is the avalanche effect on a transistor emitter-base diode. The system can be used either as a plug-in module for VME systems or as a standalone device controlled via a standard USB link by a PC running LabVIEW

The TOTEM front end driver, its components and applications in the TOTEM experiment

The TOTEM Front End Driver, so-called TOTFED, receives and handles trigger building and tracking data from the TOTEM detectors, and interfaces to the global trigger and data acquisition systems. The TOTFED is based on the VME64x standard and has deliberately been kept modular. It is very flexible and programmable to deal with the different TOTEM sub-detectors and possible evolution of the data treatment and trigger algorithms over the duration of the experiment. The main objectives for each unit are to acquire ondetector data from up to 36 optical links, to perform fast data treatment (reduction, consistency checking, etc.), to transfer it to the next level of the system (via the Slink64 interface), and to store data on request for slow spy readout via VME64x or USB2.0. The TOTFED is fully compatible with CMS and permits TOTEM to run both standalone and together with CMS. The TOTEM Front End Driver, its components and applications in the TOTEM experiment are presented in this paper

Implementation of On-Line Data Reduction Algorithms in the CMS Endcap Preshower Data Concentrator Card

The CMS Endcap Preshower (ES) sub-detector comprises 4288 silicon sensors, each containing 32 strips. The data are transferred from the detector to the counting room via 1208 optical fibres running at 800Mbps. Each fibre carries data from 2, 3 or 4 sensors. For the readout of the Preshower, a VME-based system - the Endcap Preshower Data Concentrator Card (ES-DCC) is currently under development. The main objective of each readout board is to acquire on-detector data from up to 36 optical links, perform on-line data reduction (zero suppression) and pass the concentrated data to the CMS event builder. This document presents the conceptual design of the Reduction Algorithms as well as their implementation into the ES-DCC FPGAs. The algorithms implemented into the ES-DCC resulted in a reduction factor of ~20

A VME-based readout system for the CMS Preshower sub-detector

The CMS preshower is a fine grain detector that comprises 4288 silicon sensors, each containing 32 strips. The raw data are transferred from the detector to the counting room via 1208 optical fibres. Each fibre carries a 600-byte data packet per event. The maximum average level-1 trigger rate of 100 kHz results in a total data flow of ~72 GB/s from the preshower. For the readout of the preshower, 56 links to the CMS DAQ have been reserved, each having a bandwidth of 200 MB/s (2 kB/event). The total available downstream bandwidth of GB/s necessitates a reduction in the data volume by a factor of at least 7. A modular VME-based system is currently under development. The main objective of each VME board in this system is to acquire on-detector data from at least 22 optical links, perform on-line data reduction and pass the concentrated data to the CMS DAQ. The principle modules that the system is based on are being developed in collaboration with the TOTEM experiment

Commissioning and performance of the Preshower off-detector readout electronics in the CMS experiment

The CMS Preshower is a fine grain detector that comprises 4288 silicon sensors, each containing 32 strips. The data are transferred from the detector to the counting room via 1208 optical fibres producing a total data flow of ~72GB/s. For their readout, 40 multi-FPGA 9U VME boards are used. This article is focused on the commissioning of the VME readout system using two tools: a custom connectivity test system based on FPGA embedded logic analyzers read out through JTAG and an FPGA-based system that emulates the data-traffic from the detector. Additionally, the performance of the VME readout system in the CMS experiment, including the 2009 Cosmic ray at Four Tesla (CRAFT) run, is discussed

L1 track finding for a time multiplexed trigger

At the HL-LHC, proton bunches will cross each other every 25. ns, producing an average of 140 pp-collisions per bunch crossing. To operate in such an environment, the CMS experiment will need a L1 hardware trigger able to identify interesting events within a latency of 12.5. μs. The future L1 trigger will make use also of data coming from the silicon tracker to control the trigger rate. The architecture that will be used in future to process tracker data is still under discussion. One interesting proposal makes use of the Time Multiplexed Trigger concept, already implemented in the CMS calorimeter trigger for the Phase I trigger upgrade. The proposed track finding algorithm is based on the Hough Transform method. The algorithm has been tested using simulated pp-collision data. Results show a very good tracking efficiency. The algorithm will be demonstrated in hardware in the coming months using the MP7, which is a μTCA board with a powerful FPGA capable of handling data rates approaching 1. Tb/s.This project has received funding from the European Union׳s Seventh Framework Programme for research, technological development and demonstration under grant agreement no. 317446

An FPGA-based track finder for the L1 trigger of the CMS experiment at the high luminosity LHC

A new tracking system is under development for operation in the CMS experiment at the High Luminosity LHC. It includes an outer tracker which will construct stubs, built by correlating clusters in two closely spaced sensor layers for the rejection of hits from low transverse momentum tracks, and transmit them off-detector at 40 MHz. If tracker data is to contribute to keeping the Level-1 trigger rate at around 750 kHz under increased luminosity, a crucial component of the upgrade will be the ability to identify tracks with transverse momentum above 3 GeV/c by building tracks out of stubs. A concept for an FPGA-based track finder using a fully time-multiplexed architecture is presented, where track candidates are identified using a projective binning algorithm based on the Hough Transform. A hardware system based on the MP7 MicroTCA processing card has been assembled, demonstrating a realistic slice of the track finder in order to help gauge the performance and requirements for a full system. This paper outlines the system architecture and algorithms employed, highlighting some of the first results from the hardware demonstrator and discusses the prospects and performance of the completed track finder