13 research outputs found
Electrical Compact Modeling of Graphene Base Transistors
Following the recent development of the Graphene Base Transistor (GBT), a new electrical compact model for GBT devices is proposed. The transistor model includes the quantum capacitance model to obtain a self-consistent base potential. It also uses a versatile transfer current equation to be compatible with the different possible GBT configurations and it account for high injection conditions thanks to a transit time based charge model. Finally, the developed large signal model has been implemented in Verilog-A code and can be used for simulation in a standard circuit design environment such as Cadence or ADS. This model has been verified using advanced numerical simulation
DFT study of graphene doping due to metal contacts
The experimental results of Metal\u2013graphene (M\u2013G) contact resistance (RC) have been investigated in\u2013depth by means of Density Functional Theory (DFT). The simulations allowed us to build a consistent picture explaining the RC dependence on the metal contact materials employed in this work and on the applied back\u2013gate voltage. In this respect, the M\u2013G distance is paramount in determining the RC behavior
Going Ballistic: Graphene Hot Electron Transistors
This paper reviews the experimental and theoretical state of the art in
ballistic hot electron transistors that utilize two-dimensional base contacts
made from graphene, i.e. graphene base transistors (GBTs). Early performance
predictions that indicated potential for THz operation still hold true today,
even with improved models that take non-idealities into account. Experimental
results clearly demonstrate the basic functionality, with on/off current
switching over several orders of magnitude, but further developments are
required to exploit the full potential of the GBT device family. In particular,
interfaces between graphene and semiconductors or dielectrics are far from
perfect and thus limit experimental device integrity, reliability and
performance
Graphene Base Transistors with optimized emitter and dielectrics
The Graphene Base Transistor (GBT) is a very promising device concept for analog applications. The device operates similar to the hot electron transistor and exploits the high carrier mobility of graphene to reduce the base resistance that limits the unity power gain frequency (fmax) and the noise figure (NF) of RF devices. Although the DC functionality of the GBT has been experimentally demonstrated, at present RF performance can be investigated by simulations only. In this paper, we predict the DC current and the cutoff frequency of different GBT designs (including dimensions and various materials), with the aim to optimize the GBT structure and to achieve THz operation. In particular, optimized emitter/dielectrics combinations are proposed to maximize RF figures of merit
Simulation Study of the Graphene Base Transistor
The Graphene Base Transistor (GBT) has been recently proposed to possibly overcome the THz limit for RF circuits. We developed a modelling framework to explore the GBT design space, the device optimization and the prediction of its RF performance. Via a proper scaling of the EBI and BCI thicknesses, the THz operation is achievable both in terms of fT and fmax. In this latter case, a very low RCONT value is required, thus it is necessary to improve the metal-graphene interface beyond state of the art graphene technology
Improved understanding of metal\u2013graphene contacts
Metal\u2013graphene (M\u2013G) contact resistance (RC) is studied through extensive experimental characterization,Monte\u2013Carlo transport simulations and Density Functional Theory (DFT) analysis. We show that the back\u2013gate voltage dependence of RC cannot be explained only in terms of the resistance of the junction at the edge between contact and channel region. Experiments and DFT calculations indicate a consistent picture where both Ni andAu contacts have a M\u2013G distance larger than the minimum energy distance, and where the M\u2013G distance is crucial in determining the RC value
State-of-the-art semi-classical Monte Carlo method for carrier transport in nanoscale transistors
We review the Monte Carlo method to model
semi-classical carrier transport in advanced semiconductor
devices. We report examples of the use of the Multi-
Subband Monte Carlo method to simulate MOSFETs with
III-V compound semiconductor channel. Monte Carlo
transport modeling of graphene-based transistors is also
addressed
New device concepts, transistor architectures and materials for high performance and energy efficient CMOS circuits in the forthcoming era of 3D integrated circuits
This paper addresses selected topics about recent developments in CMOS technologies evolving towards 3D integrated circuits and incorporating innovative device concepts and ever new material