Morrigan: A Composite Instruction TLB Prefetcher

The effort to reduce address translation overheads has typically targeted data accesses since they constitute the overwhelming portion of the second-level TLB (STLB) misses in desktop and HPC applications. The address translation cost of instruction accesses has been relatively neglected due to historically small instruction footprints. However, state-of-the-art datacenter and server applications feature massive instruction footprints owing to deep software stacks, resulting in high STLB miss rates for instruction accesses. This paper demonstrates that instruction address translation is a performance bottleneck in server workloads. In response, we propose Morrigan, a microarchitectural instruction STLB prefetcher whose design is based on new insights regarding instruction STLB misses. At the core of Morrigan there is an ensemble of table-based Markov prefetchers that build and store variable length Markov chains out of the instruction STLB miss stream. Morrigan further employs a sequential prefetcher and a scheme that exploits page table locality to maximize miss coverage. An important contribution of the work is showing that access frequency is more important than access recency when choosing replacement candidates. Based on this insight, Morrigan introduces a new replacement policy that identifies victims in the Markov prefetchers using a frequency stack while adapting to phase-change behavior. On a set of 45 industrial server workloads, Morrigan eliminates 69% of the memory references in demand page walks triggered by instruction STLB misses and improves geometric mean performance by 7.6%.This work is partially supported by the Spanish Ministry of Science and Technology through the PID2019-107255GB project, the Generalitat de Catalunya (contract 2017-SGR-1414), the NSF grant CCF-1912617, the Semiconductor Research Corporation grant 2936.001, and generous gifts from Intel Labs. Georgios Vavouliotis has been supported by the Spanish Ministry of Economy, Industry and Competitiveness and the European Social Fund under the FPI fellowship No. PRE2018-087046. Marc Casas has been supported by the Spanish Ministry of Economy, Industry and Competitiveness under the Ramon y Cajal fellowship No. RYC-2017-23269.Peer ReviewedPostprint (author's final draft

Morrigan: A composite instruction TLB prefetcher

The effort to reduce address translation overheads has typically targeted data accesses since they constitute the overwhelming portion of the second-level TLB (STLB) misses in desktop and HPC applications. The address translation cost of instruction accesses has been relatively neglected due to historically small instruction footprints. However, state-of-the-art datacenter and server applications feature massive instruction footprints owing to deep software stacks, resulting in high STLB miss rates for instruction accesses. This paper demonstrates that instruction address translation is a performance bottleneck in server workloads. In response, we propose Morrigan, a microarchitectural instruction STLB prefetcher whose design is based on new insights regarding instruction STLB misses. At the core of Morrigan there is an ensemble of table-based Markov prefetchers that build and store variable length Markov chains out of the instruction STLB miss stream. Morrigan further employs a sequential prefetcher and a scheme that exploits page table locality to maximize miss coverage. An important contribution of the work is showing that access frequency is more important than access recency when choosing replacement candidates. Based on this insight, Morrigan introduces a new replacement policy that identifies victims in the Markov prefetchers using a frequency stack while adapting to phase-change behavior. On a set of 45 industrial server workloads, Morrigan eliminates 69% of the memory references in demand page walks triggered by instruction STLB misses and improves geometric mean performance by 7.6%.This work is partially supported by the Spanish Ministry of Science and Technology through the PID2019-107255GB project, the Generalitat de Catalunya (contract 2017-SGR-1414), the NSF grant CCF-1912617, the Semiconductor Research Corporation grant 2936.001, and generous gifts from Intel Labs. Georgios Vavouliotis has been supported by the Spanish Ministry of Economy, Industry and Competitiveness and the European Social Fund under the FPI fellowship No. PRE2018-087046. Marc Casas has been supported by the Spanish Ministry of Economy, Industry and Competitiveness under the Ramon y Cajal fellowship No. RYC-2017-23269.Peer ReviewedPostprint (author's final draft

Page size aware cache prefetching

The increase in working set sizes of contemporary applications outpaces the growth in cache sizes, resulting in frequent main memory accesses that deteriorate system per- formance due to the disparity between processor and memory speeds. Prefetching data blocks into the cache hierarchy ahead of demand accesses has proven successful at attenuating this bottleneck. However, spatial cache prefetchers operating in the physical address space leave significant performance on the table by limiting their pattern detection within 4KB physical page boundaries when modern systems use page sizes larger than 4KB to mitigate the address translation overheads. This paper exploits the high usage of large pages in modern systems to increase the effectiveness of spatial cache prefetch- ing. We design and propose the Page-size Propagation Module (PPM), a µarchitectural scheme that propagates the page size information to the lower-level cache prefetchers, enabling safe prefetching beyond 4KB physical page boundaries when the accessed blocks reside in large pages, at the cost of augmenting the first-level caches’ Miss Status Holding Register (MSHR) entries with one additional bit. PPM is compatible with any cache prefetcher without implying design modifications. We capitalize on PPM’s benefits by designing a module that consists of two page size aware prefetchers that inherently use different page sizes to drive prefetching. The composite module uses adaptive logic to dynamically enable the most appropriate page size aware prefetcher. Finally, we show that the proposed designs are transparent to which cache prefetcher is used. We apply the proposed page size exploitation techniques to four state-of-the-art spatial cache prefetchers. Our evalua- tion shows that our proposals improve single-core geomean performance by up to 8.1% (2.1% at minimum) over the original implementation of the considered prefetchers, across 80 memory-intensive workloads. In multi-core contexts, we report geomean speedups up to 7.7% across different cache prefetchers and core configurations.This work is supported by the Spanish Ministry of Science and Technology through the PID2019-107255GB project, the Generalitat de Catalunya (contract 2017-SGR-1414), the European Union Horizon 2020 research and innovation program under grant agreement No 955606 (DEEP-SEA EU project), the National Science Foundation through grants CNS-1938064 and CCF-1912617, and the Semiconductor Research Corporation project GRC 2936.001. Georgios Vavouliotis has been supported by the Spanish Ministry of Economy, Industry, and Competitiveness and the European Social Fund under the FPI fellowship No. PRE2018-087046. Marc Casas has been partially supported by the Grant RYC2017-23269 funded by MCIN/AEI/10.13039/501100011033 and ESF ‘Investing in your future’.Peer ReviewedPostprint (author's final draft

The preliminary design of a scaled Composite UHBR Fan for a wind tunnel test campaign

AbstractThe ambition of the CA3ViAR project is to design an open test case fan that experiences instability mechanisms, which are representative for ultra-high bypass ratio (UHBR) fans of civil aircrafts, and to perform a comprehensive experimental investigation to measure aerodynamic, aeroelastic and aeroacoustic performance in a wide range of operational conditions. Experimental tests will be performed in the Propulsion-Test-Facility (PTF) of the Institute of Jet Propulsion and Turbomachinery (IFAS) of Technische Universität Braunschweig, Germany. The final objective of the project is to provide an open test case for the entire research community, with geometries, numerical and experimental results to establish a new reference for composite UHBR fan design. This will support the development of new methods and tools for the development of safer, lighter and more efficient composite fans for greener UHBR engines. In this work the preliminary design of the low transonic fan (LTF) to be used as test article, whose main requirement is to be operated in a safe and controlled way in conditions of aerodynamic and/or aeroelastic instability during wind tunnel operations, is presented. More in particular, consolidated aerodynamic design, strategy adopted to drive the structural design, flutter analysis taking into account acoustic reflection at the intake, dynamic and stress analyses, as well as aeroacoustic measurement optimization are presented and discussed. The preliminary mechanical design of composite blades and the rotor hub, together with the rotor instrumentation and related studies to embed sensors in the composite blades, are also part of this article, and complemented by manufacturing trials and demonstration tests give the full picture of all the project activities up to the preliminary design review

Application of standardization for the design and construction of carbon nanotube-based product pilot lines in compliance with EU regulation on machinery

The "PLATFORM" manufacturing ecosystem for pilot production of pre-commercial CNT-based nano-enabled products, consists of three pilot lines (PPLs) for the manufacture of buckypapers, doped prepregs and doped veils. The PPLs have been constructed with the ultimate goal to commercialize these products in the European market in 2020/2022.This goal requires having the PPLs in compliance with the applicable product safety regulation by that date (CE marking). The main EU regulation for new machinery (as the PPLs) is the Directive 2006/42/EC on Machinery (MD). This Directive sets out the general mandatory Essential Health and Safety Requirements (EHSRs) related to the design and construction of machinery, while particular technical specifications for fulfilling them are provided in European harmonized standards. Application of harmonized standards is voluntary but confers a presumption of conformity with the EHSRs they cover. The PPLs are unique machines for own use and must comply with the MD before they are put into service, in 2020/2022. But the MD does not provide specific EHSRs for nanosafety and no harmonized standards are available in this field for the safe design of the PPLs. In this context, this paper shows the standardization strategy followed by the project PLATFORM (GA 646307) to design the PPLs in compliance with the EHSR referred to the risks to health resulting from hazardous substances emitted by machinery (MD, Annex I, EHSR 1.5.13). In the absence of nanosafety harmonized standards to satisfy the aforementioned EHSR, the design and design verification of the PPLs were carried out through A & B - type harmonized standards (e.g. EN ISO 12100, EN ISO 14123-1/2), and other European and international standards.The projects PLATFORM and OASIS have received funding from the European Union’s Horizon 2020 research and innovation programme, under grant agreements Nº 646307 and Nº 814581, respectively. This paper reflects only the authors’ views, and the Commission is not responsible for any use that may be made of the information contained therein

Cu vapor-assisted formation of nanostructured Mo2C electrocatalysts via direct chemical conversion of Mo surface for efficient hydrogen evolution reaction applications

In order to fulfill the demands for sustainable hydrogen production, novel, more efficient and inexpensive (precious metal-free) catalysts are thoroughly investigated. In the present study, a nanostructured Mo carbide film is prepared, using a chemical vapor deposition (CVD) process in Cu vapor, which promotes CH4 decomposition and the rapid carbonization of a commercial Mo foil. Structural X-ray diffraction (XRD) analysis reveals the orthorhombic crystal structure of the film. The Mo carbide film is tested as an electrocatalyst for the hydrogen evolution reaction (HER) in acidic media. The interconnection between the carbide and the underlying Mo foil leads to an enhanced electrocatalytic activity (Tafel slope − 65 mV/dev, overpotential at 10 mA/cm2 – 330 mV), followed by excellent durability after 1000 cycles. Ultraviolet photoemission spectroscopy (UPS) provides clear evidences verifying the enhanced activity on the carbonized Mo surface. Furthermore, an increase in the carbon precursor flow favors the simultaneous growth of graphene/Mo2C heterostrustructure that forms a vertical stack and exhibits even greater electrocatalytic properties. Thus, the heterostructure possesses Tafel slope and overpotential of 56 mV/dec, at n = 212–218 mV, and 270 mV, respectively, which approach values of commercially available Pt catalysts. © 2020 Elsevier B.V

PLATFORM: Study of the integration of new nanomaterials in a current processes of manufacture with prepreg materials in aeronautics

PLATFORM appear for the need to improve non-intrinsic properties of composite materials, principally its mechanical and electrical properties. The main objective of the project is to analyze the possibility of introducing three new materials in development into the current manufacturing processes, improving the properties of the raw material, more concrectly prepreg unidirectional carbon fibre with epoxy resin. Several material developments are made with carbon nanotubes in three different formats: buckypapers, thermoplastic doped veils and CTN treated prepreg. The implementation of each materials has been studied in current infusion processes, more concretely manufacturing with prepregs and cure in an autoclave. The studied possibilities are: buckypapers incorporated and doped veils embedded in prepreg laminates or full manufacturing with treated prepreg. The obtained results at the 2nd year of the project are satisfactory, but it´s necessary to optimize the materials to automate the manufacturing and improve the final properties