Low power output-capacitorless class-AB CMOS LDO regulator

Peer ReviewedPostprint (published version

Performance analysis of dual-frequency buck converter for integrated power management

The use of dual-frequency (DF) buck converter architecture consisting of a merged structure of high and low frequency buck cells is presented as a candidate topology for integrated power management to obtain favorable tradeoffs in terms of efficiency, switching ripple, and bandwidth. It is shown that having two degrees of freedom in designing the DF buck helps to achieve high efficiency and low output ripples, simultaneously. A comparison analysis is done with regards to the aforementioned performance indexes with the standard and three-level buck converters and the results are validated in HSPICE in a 0.35 µm CMOS process.Peer Reviewe

Lifts directive Report of a meeting of the Standing Committee set up under Article 6.3 of Directive 95/16/EC, Brussels 9-10 June 1997

URN 97/776SIGLEAvailable from British Library Document Supply Centre-DSC:GPE/1315 / BLDSC - British Library Document Supply CentreGBUnited Kingdo

Power efficient LDO-assisted DC-DC buck converter for integrated power management systems

Buck converter; efficiency; LDO-assisted; linear-assisted; output ripple.Postprint (published version

Double–frequency buck converter as a candidate topology for integrated envelope elimination and restoration applications in power supply of RFPAs

Peer Reviewe

Integrated power management system based on efficient LDO-assisted DC/DC buck converter

In this paper, a new structure based on linear-assisted DC-DC buck converter principle is proposed. Using a new class-AB LDO regulator instead of the conventional linear one (based on a push-pull output stage) in the hybrid scheme, reduces the difference between input and output voltages and also the switching frequency of the buck converter. Thus, the proposal achieves higher power efficiency rather than the conventional linear-assisted converter, desired for power management systems of battery operated devices like biomedical implants and energy harvesting applications. In addition, the circuit provides a lower output ripple and better transient response. A comparison analysis is done with regards to the considered performance indexes between the proposed structure and linear-assisted buck converter, and the results are validated in HSPICE in a 0.35 µm CMOS process.Peer ReviewedPostprint (published version

LDO-assisted vs. linear-assisted DC/DC converters: a comprehensive study and comparison

This paper deals with a comprehensive study and comparison on the conventional linear-assisted converter and a new structure named, LDO-assisted converter based on a new class-AB LDO regulator instead of the conventional linear one, in terms of efficiency, output ripple, and load transient response. The new structure reduces difference between input and output voltages and also switching frequency of the buck converter, corresponding to higher power efficiency, desired for power management systems of battery operated devices like biomedical implants and energy harvesting applications. A comparison analysis is done and the results are validated in HSPICE in a 0.18 µm CMOS process.Postprint (published version

An efficient CMOS LDO-assisted DC/DC buck regulator

In this paper, a new structure based on linear-assisted DC-DC buck converter principle is proposed. Using a segmented LDO regulator instead of the conventional linear one in the hybrid scheme, reduces the difference between input and output voltages and also the switching frequency of the buck converter, while the circuit provides a lower output ripple, better transient response. In addition, the proposal achieves higher power efficiency rather than the linear-assisted converter, desired for power management systems of battery operated devices like biomedical implants and energy harvesting applications. A comparison analysis is done with regards to the mentioned performance indexes between the proposed structure and linear-assisted buck converter and the results are validated in HSPICE in a 0.35 µm CMOS process.Peer ReviewedPostprint (published version

An output-capacitorless FVF-based low-dropout regulator for power management applications

This paper presents an output-capacitorless low dropout (LDO) regulator based on improved flipped voltage follower power stage for use in power management circuits. A new error amplifier (EA) structure, named as gain-bandwidth enhanced EA, is embedded in the LDO regulator. The LDO regulator is designed for the input and output voltages of 1.2 V and 1 V, respectively. Fast transients, low overshoot and undershoot, and low quiescent current of 6 µA are achieved for the proposed circuit. The LDO regulator is designed for maximum load current of 50 mA, achieving the current and power efficiencies of 99.99% and 83.3%, respectively. Additionally, up to 131 pF capacitance is used in the proposed LDO structure. The proposed circuit is designed and verified in HSPICE in TSMC 0.18 µm mixed signal CMOS process.Peer ReviewedPostprint (published version