1,970 research outputs found

    The effects of feedback on the behavioral profile of preservice teachers across three educational levels of the physical education student teaching experience.

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    The student teaching experience represents one of the most important components of a novice physical educator\u27s preservice preparation. However, current research raises several important issues regarding the cooperating teacher\u27s role as clinical supervisor. At the present time a less than complete picture exists of the effect of feedback using systematic behavioral data by cooperating teachers on their assigned preservice teacher in a variety of settings. This study adds to a research base that has rarely used behavior analytic designs in the past decade. A reversal to baseline research design was used to determine whether cooperating teachers could provide systematically collected data in combination with prescriptive feedback and change the behavioral profile of student teachers and their pupils at three different educational levels, specifically elementary, middle, and high school. The participants were two student teachers who each taught at the same high school and elementary schools, but differing middle schools. Results showed that in regards to the student teacher\u27s behavior and that of their students, the cooperating teacher made positive changes by providing data only and also by providing data augmented by prescriptive feedback. Furthermore, each intervention was successful across all three levels of education. On particular intervention did not necessarily out perform the other and there were no order effects observed. However, while no order effects were present, the variable of time did appear to be an issue in relation to the performance of the independent variables

    The impacts of credit on village economies

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    April 9, 200

    A structural evaluation of a large-scale quasi-experimental microfinance initiative

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    December 1, 200

    Repurposing Plastic Waste in El Cercado

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    This project aims to assist the community of El Cercado in the Dominican Republic in turning their plastic waste into useful products. The design team developed a first iteration shredder, injector, and aluminum mold which future design teams could further iterate in order to make products out of waste plastic. Different products were researched to ensure that they can be sold or used in the community. The goal of producing these items is to stimulate economic activity in the community by creating economic opportunity. The design shall also be sustainable in three ways. It shall reuse plastic waste while also ensuring that the energy used is sustainable. Additionally, it shall be designed to have long term impact in the community. The first iteration machines were modified versions of schematics published by a non-profit organization called Precious Plastic. The design team borrowed a shredder from LA Precious Plastic for experimental testing, which successfully shreds the plastic waste into small pieces. For the team’s shredder, all of the metal, all of the acrylic, the motor, and the reducer were bought, and manufacturing was completed on the teeth, spacers, shaft, and partial casing for the team’s shredder. For testing on the first-iteration injector, plastic chips were melted and injected into a mold. For the shredder, future teams should first find the optimal motor, and then design the parts in the following order: teeth, spacers, comb, motor, reducer, bearing, base, housing, hopper. Better heating and increased pressure are two clear paths that would lead to a more effective injector and ultimately expand the amount of plastic that can reach the mold

    A Scalable Unsegmented Multiport Memory for FPGA-Based Systems

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    On-chip multiport memory cores are crucial primitives for many modern high-performance reconfigurable architectures and multicore systems. Previous approaches for scaling memory cores come at the cost of operating frequency, communication overhead, and logic resources without increasing the storage capacity of the memory. In this paper, we present two approaches for designing multiport memory cores that are suitable for reconfigurable accelerators with substantial on-chip memory or complex communication. Our design approaches tackle these challenges by banking RAM blocks and utilizing interconnect networks which allows scaling without sacrificing logic resources. With banking, memory congestion is unavoidable and we evaluate our multiport memory cores under different memory access patterns to gain insights about different design trade-offs. We demonstrate our implementation with up to 256 memory ports using a Xilinx Virtex-7 FPGA. Our experimental results report high throughput memories with resource usage that scales with the number of ports
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