Effect of impact ionization in scaled pHEMTs

The effect of impact ionization on pseudomorphic high electron mobility transistors is studied using Monte Carlo simulations when these devices are scaled into deep decanano dimensions. The scaling of devices with gate lengths of 120, 90, 70, 50 and 30 nm has been performed in both lateral and vertical directions. The impact ionization is treated as an additional scattering mechanism in the Monte Carlo module. The critical drain voltage, at which device characteristics begin to indicate breakdown, decreases as the gate voltage is lowered. Similarly, the breakdown drain voltage is also found to decrease during the scaling process

RF analysis of aggressively scaled pHEMTs

No abstract avaliable

Titania/alumina bilayer gate insulators for InGaAs metal-oxide-semiconductor devices

We describe the electrical properties of atomic layer deposited TiO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub> bilayer gate oxides which simultaneously achieve high gate capacitance density and low gate leakage current density. Crystallization of the initially amorphous TiO<sub>2</sub> film contributes to a significant accumulation capacitance increase (∼33%) observed after a forming gas anneal at 400 °C. The bilayer dielectrics reduce gate leakage current density by approximately one order of magnitude at flatband compared to Al<sub>2</sub>O<sub>3</sub> single layer of comparable capacitance equivalent thickness. The conduction band offset of TiO<sub>2</sub> relative to InGaAs is 0.6 eV, contributing to the ability of the stacked dielectric to suppress gate leakage conduction

50-nm self-aligned and 'standard' T-gate InP pHEMT comparison: the influence of parasitics on performance at the 50-nm node

Continued research into the development of III-V high-electron mobility transistors (HEMTs), specifically the minimization of the device gate length, has yielded the fastest performance reported for any three terminal devices to date. In addition, more recent research has begun to focus on reducing the parasitic device elements such as access resistance and gate fringing capacitance, which become crucial for short gate length device performance maximization. Adopting a self-aligned T-gate architecture is one method used to reduce parasitic device access resistance, but at the cost of increasing parasitic gate fringing capacitances. As the device gate length is then reduced, the benefits of the self-aligned gate process come into question, as at these ultrashort-gate dimensions, the magnitude of the static fringing capacitances will have a greater impact on performance. To better understand the influence of these issues on the dc and RF performance of short gate length InP pHEMTs, the authors present a comparison between In0.7Ga0.3As channel 50-nm self-aligned and "standard" T-gate devices. Figures of merit for these devices include transconductance greater than 1.9 S/mm, drive current in the range 1.4 A/mm, and fT up to 490 GHz. Simulation of the parasitic capacitances associated with the self-aligned gate structure then leads a discussion concerning the realistic benefits of incorporating the self-aligned gate process into a sub-50-nm HEMT syste

Terahertz Microstrip Elevated Stack Antenna Technology on GaN-on-Low Resistivity Silicon Substrates for TMIC

In this paper we demonstrate a THz microstrip stack antenna on GaN-on-low resistivity silicon substrates (ρ < 40 Ω.cm). To reduce losses caused by the substrate and to enhance performance of the integrated antenna at THz frequencies, the driven patch is shielded by silicon nitride and gold in addition to a layer of benzocyclobutene (BCB). A second circular patch is elevated in air using gold posts, making this design a stack configuration. The demonstrated antenna shows a measured resonance frequency in agreement with the modeling at 0.27 THz and a measured S11 as low as −18 dB was obtained. A directivity, gain and radiation efficiency of 8.3 dB, 3.4 dB, and 32% respectively was exhibited from the 3D EM model. To the authors' knowledge, this is the first demonstrated THz integrated microstrip stack antenna for TMIC (THz Monolithic Integrated Circuits) technology; the developed technology is suitable for high performance III-V material on low resistivity/high dielectric substrates

50 nm GaAs mHEMTs and MMICs for ultra-low power distributed sensor network applications

We report well-scaled 50 nm GaAs metamorphic HEMTs (mHEMTs) with DC power consumption in the range 1-150 ΜW/Μ demonstrating f<sub>T</sub> of 30-400 GHz. These metrics enable the realisation of ultra-low power (<500 ΜW) radio transceivers for autonomous distributed sensor network applications

Ultrafast harmonic mode-locking of monolithic compound-cavity laser diodes incorporating photonic-bandgap reflectors

We present the first demonstration of reproducible harmonic mode-locked operation from a novel design of monolithic semiconductor laser comprising a compound cavity formed by a 1-D photonic-bandgap (PBG) mirror. Mode-locking (ML) is achieved at a harmonic of the fundamental round-trip frequency with pulse repetition rates from 131 GHz up to a record high frequency of 2.1 THz. The devices are fabricated from GaAs-Al-GaAs material emitting at a wavelength of 860 nm and incorporate two gain sections with an etched PBG reflector between them, and a saturable absorber section. Autocorrelation studies are reported which allow the device behavior for different ML frequencies, compound cavity ratios, and type and number of intra-cavity reflectors to be analyzed. The highly reflective PBG microstructures are shown to be essential for subharmonic-free ML operation of the high-frequency devices. We have also demonstrated that the single PBG reflector can be replaced by two separate features with lower optical loss. These lasers may find applications in terahertz; imaging, medicine, ultrafast optical links, and atmospheric sensing

Very high performance 50 nm T-gate III-V HEMTs enabled by robust nanofabrication technologies

In this paper, we review a range of nanofabrication techniques which enable the realization of uniform, high yield, high performance 50 nm T-gate III-V high electron mobility transistors (HEMTs). These technologies have been applied in the fabrication of a range of lattice matched and pseudomorphic InP HEMTs and GaAs metamorphic HEMTs with functional yields in excess of 95%, threshold voltage uniformity of 5 mV, DC transconductance of up to 1600 mS/mm and f/sub T/ of up to 480 GHz. These technologies and device demonstrators are key to enabling a wide range of millimeter-wave imaging and sensing applications beyond 100 GHz, particularly where array-based multi-channel solutions are required

The Evolution of Protoplanetary Disks Around Millisecond Pulsars: The PSR 1257 +12 System

We model the evolution of protoplanetary disks surrounding millisecond pulsars, using PSR 1257+12 as a test case. Initial conditions were chosen to correspond to initial angular momenta expected for supernova-fallback disks and disks formed from the tidal disruption of a companion star. Models were run under two models for the viscous evolution of disks: fully viscous and layered accretion disk models. Supernova-fallback disks result in a distribution of solids confined to within 1-2 AU and produce the requisite material to form the three known planets surrounding PSR 1257+12. Tidal disruption disks tend to slightly underproduce solids interior to 1 AU, required for forming the pulsar planets, while overproducing the amount of solids where no body, lunar mass or greater, exists. Disks evolving under 'layered' accretion spread somewhat less and deposit a higher column density of solids into the disk. In all cases, circumpulsar gas dissipates on $\lesssim 10^{5}$ year timescales, making formation of gas giant planets highly unlikely.Comment: 16 pages, 17 figures, Accepted for publication in The Astrophysical Journal (September 20, 2007 issue

Optimizations of sub-100 nm Si/SiGe MODFETs for high linearity RF applications

Based on careful calibration in respect of 70 nm n-type strained Si channel S/SiGe modulation doped FETs (MODFETs) fabricated by Daimler Chrysler, numerical simulations have been used to study the impact of the device geometry and various doping strategies on device performance and linearity. The device geometry is sensitive to both RF performance and device linearity. Doped channel devices are found to be promising for high linearity applications. Trade-off design strategies are required for reconciling the demands of high device performance and high linearity simultaneously. The simulations also suggest that gate length scaling helps to achieve higher RF performance, but decreases the linearity