Quantum Resonances of Weakly Linked, Mesoscopic, Superconducting Dots

We examine quantum properties of mesoscopic, Josephson coupled superconducting dots, in the limit that charging effects and quantization of energy levels within the dots are negligible, but quasi-particle transmission into the weak link is not. We demonstrate that quasi-particle resonances lead to current-phase relations, which deviate markedly from those of weak links connecting macroscopic superconductors. Results for the steady state dc Josephson current of two coupled dots are presented.Comment: Tex, 3 figures available on request to [email protected] (Andy Martin

Generalized disjunction decomposition for the evolution of programmable logic array structures

Evolvable hardware refers to a self reconfigurable electronic circuit, where the circuit configuration is under the control of an evolutionary algorithm. Evolvable hardware has shown one of its main deficiencies, when applied to solving real world applications, to be scalability. In the past few years several techniques have been proposed to avoid and/or solve this problem. Generalized disjunction decomposition (GDD) is one of these proposed methods. GDD was successful for the evolution of large combinational logic circuits based on a FPGA structure when used together with bi-directional incremental evolution and with (1+ë) evolution strategy. In this paper a modified generalized disjunction decomposition, together with a recently introduced multi-population genetic algorithm, are implemented and tested for its scalability for solving large combinational logic circuits based on Programmable Logic Array (PLA) structures

Generalized disjunction decomposition for evolvable hardware

Evolvable hardware (EHW) refers to self-reconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). One of the main difficulties in using EHW to solve real-world problems is scalability, which limits the size of the circuit that may be evolved. This paper outlines a new type of decomposition strategy for EHW, the “generalized disjunction decomposition” (GDD), which allows the evolution of large circuits. The proposed method has been extensively tested, not only with multipliers and parity bit problems traditionally used in the EHW community, but also with logic circuits taken from the Microelectronics Center of North Carolina (MCNC) benchmark library and randomly generated circuits. In order to achieve statistically relevant results, each analyzed logic circuit has been evolved 100 times, and the average of these results is presented and compared with other EHW techniques. This approach is necessary because of the probabilistic nature of EA; the same logic circuit may not be solved in the same way if tested several times. The proposed method has been examined in an extrinsic EHW system using the$(1 + lambda)$evolution strategy. The results obtained demonstrate that GDD significantly improves the evolution of logic circuits in terms of the number of generations, reduces computational time as it is able to reduce the required time for a single iteration of the EA, and enables the evolution of larger circuits never before evolved. In addition to the proposed method, a short overview of EHW systems together with the most recent applications in electrical circuit design is provided

A novel genetic algorithm for evolvable hardware

Evolutionary algorithms are used for solving search and optimization problems. A new field in which they are also applied is evolvable hardware, which refers to a self-configurable electronic system. However, evolvable hardware is not widely recognized as a tool for solving real-world applications, because of the scalability problem, which limits the size of the system that may be evolved. In this paper a new genetic algorithm, particularly designed for evolving logic circuits, is presented and tested for its scalability. The proposed algorithm designs and optimizes logic circuits based on a Programmable Logic Array (PLA) structure. Furthermore it allows the evolution of large logic circuits, without the use of any decomposition techniques. The experimental results, based on the evolution of several logic circuits taken from three different benchmarks, prove that the proposed algorithm is very fast, as only a few generations are required to fully evolve the logic circuits. In addition it optimizes the evolved circuits better than the optimization offered by other evolutionary algorithms based on a PLA and FPGA structures

On evolution of relatively large combinational logic circuits

Evolvable hardware (EHW) (Yao and Higuchi, 1999) is a technique introduced to automatically design circuits where the circuit configuration is carried out by evolutionary algorithms. One of the main difficulties in using EHW to solve real-world problems is the scalability. Until now, several strategies have been proposed to avoid this problem, but none of them completely tackle the issue. In this paper three different methods for evolving the most complex circuits have been tested for their scalability. These methods are bi-directional incremental evolution (SO-BIE); generalised disjunction decomposition (GD-BIE) and evolutionary strategies (ES) with dynamic mutation rate. In order to achieve the generalised conclusions the chosen approaches were tested using multipliers, traditionally used in EHW, but also logic circuits taken from MCNC (Yang, 1991) benchmark library and randomly generated circuits. The analysis of the approaches demonstrated that PLA-based ES is capable of evolving logic circuits of up to 12 inputs. The use of SO-BIE allows the generation of fully functional circuits of 14 inputs and GD-BIE is estimated to be able to evolve circuits of 21 inputs

Random Scattering Matrices and the Circuit Theory of Andreev Conductances

The conductance of a normal-metal mesoscopic system in proximity to superconducting electrode(s) is calculated. The normal-metal part may have a general geometry, and is described as a ``circuit'' with ``leads'' and ``junctions''. The junctions are each ascribed a scattering matrix which is averaged over the circular orthogonal ensemble, using recently-developed techniques. The results for the electrical conductance reproduce and extend Nazarov's circuit theory, thus bridging between the scattering and the bulk approaches. The method is also applied to the heat conductance.Comment: 12 pages, RevTeX, including 2 figures with eps

Sub-gap conductance in ferromagnetic-superconducting mesoscopic structures

We study the sub-gap conductance of a ferromagnetic mesoscopic region attached to a ferromagnetic and a superconducting electrode by means of tunnel junctions. In the absence of the exchange field, the ratio $r= \gamma / \epsilon_T$ of the two tunnel junction resistances determines the behaviour of the sub-gap conductance which possesses a zero-bias peak for $r\gg 1$ and for $r\ll 1$ a peak at finite voltage. We show that the inclusion of the exchange field leads to a peak splitting for $r\ll 1$, while it shifts the zero-bias anomaly to finite voltages for $r\gg 1$.Comment: 5 pages revte

Non-equilibrium Entanglement and Noise in Coupled Qubits

We study charge entanglement in two Coulomb-coupled double quantum dots in thermal equilibrium and under stationary non-equilibrium transport conditions. In the transport regime, the entanglement exhibits a clear switching threshold and various limits due to suppression of tunneling by Quantum Zeno localisation or by an interaction induced energy gap. We also calculate quantum noise spectra and discuss the inter-dot current correlation as an indicator of the entanglement in transport experiments.Comment: 4 pages, 4 figure