Etched graphene quantum dots on hexagonal boron nitride

We report on the fabrication and characterization of etched graphene quantum dots (QDs) on hexagonal boron nitride (hBN) and SiO2 with different island diameters. We perform a statistical analysis of Coulomb peak spacings over a wide energy range. For graphene QDs on hBN, the standard deviation of the normalized peak spacing distribution decreases with increasing QD diameter, whereas for QDs on SiO2 no diameter dependency is observed. In addition, QDs on hBN are more stable under the influence of perpendicular magnetic fields up to 9T. Both results indicate a substantially reduced substrate induced disorder potential in graphene QDs on hBN

Etched graphene single electron transistors on hexagonal boron nitride in high magnetic fields

We report on the fabrication and electrical characterisation of etched graphene single electron transistors (SETs) of various sizes on hexagonal boron nitride (hBN) in high magnetic fields. The electronic transport measurements show a slight improvement compared to graphene SETs on SiO2. In particular, SETs on hBN are more stable under the influence of perpendicular magnetic fields up to 9T in contrast to measurements reported on SETs on SiO2. This result indicates a reduced surface disorder potential in SETs on hBN which might be an important step towards clean and more controllable graphene QDs.Comment: To be published in Phys. Status Solidi

Strained Silicon Complementary TFET SRAM: Experimental Demonstration and Simulations

A half SRAM cell with strained Si nanowire complementary tunnel-FETs (TFETs) was fabricated and characterized to explore the feasibility and functionality of 6T-SRAM based on TFETs. Outward-faced n-TFETs are used as access-transistors. Static measurements were performed to determine the SRAM butterfly curves, allowing the assessment of cell functionality and stability. The forward p-i-n leakage of the access-transistor at certain bias configurations leads to malfunctioning storage operation, even without the contribution of the ambipolar behavior. At large VDD, lowering of the bit-line bias is needed to mitigate such effect, demonstrating functional hold, read and write operations. Circuit simulations were carried out using a Verilog-A compact model calibrated on the experimental TFETs, providing a better understanding of the TFET SRAM operation at different supply voltages and for different cell sizing and giving an estimate of the dynamic performance of the cell

Probing two-electron multiplets in bilayer graphene quantum dots

Understanding how the electron spin is coupled to orbital degrees of freedom, such as a valley degree of freedom in solid-state systems is central to applications in spin-based electronics and quantum computation. Recent developments in the preparation of electrostatically-confined quantum dots in gapped bilayer graphene (BLG) enables to study the low-energy single-electron spectra in BLG quantum dots, which is crucial for potential spin and spin-valley qubit operations. Here, we present the observation of the spin-valley coupling in a bilayer graphene quantum dot in the single-electron regime. By making use of a highly-tunable double quantum dot device we achieve an energy resolution allowing us to resolve the lifting of the fourfold spin and valley degeneracy by a Kane-Mele type spin-orbit coupling of $\approx 65~\mu$eV. Also, we find an upper limit of a potentially disorder-induced mixing of the $K$ and $K'$ states below $20~\mu$eV.Comment: 5 Pages 5 Figure

Hall effect measurements on InAs nanowires

We have processed Hall contacts on InAs nanowires grown by molecular beam epitaxy using an electron beam lithography process with an extremely high alignment accuracy. The carrier concentrations determined from the Hall effect measurements on these nanowires are lower by a factor of about 4 in comparison with those measured by the common field-effect technique. The results are used to evaluate quantitatively the charging effect of the interface and surface states

Monitoring structural influences on quantum transport in InAs nanowires

A sample design that allows for quantum transport and transmission electron microscopy (TEM) on individual suspended nanostructures is used to investigate moderately n-type doped InAs nanowires (NWs). The nanowires were grown by metal organic vapor phase epitaxy. Universal conductance fluctuations in the nanowires are investigated at temperatures down to 0.35 K. These fluctuations show two different temperature dependences. The very same nanowire segments investigated in transport are subsequently analyzed by TEM revealing crystal phase mixing. However, we find no correspondence between the atomic structure of the wires and the temperature dependences of the conductance fluctuations. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4742326

Photon guiding characteristics of waveguide membranes coupled to a microdisk of ZnSe/(Zn,Mg)Se quantum well structures

Integrated optical devices composed of waveguides and microdisks emitting blue light were fabricated from ZnSe/(Zn,Mg)Se quantum well structures. Here we study the optical properties and photon guiding characteristics of such devices. The structures were fabricated by multi-step electron beam lithography and subsequent wet chemical etching. The transfer characteristic of photons through the waveguide was analyzed via spatial-resolved μ-photoluminescence spectroscopy. Spatial excitation of the microdisk revealed substantial overcoupling of photons from the microdisk into the waveguide

Realization of vertical Ge nanowires for gate-all-around transistors

Towards gate-all-around (GAA) FETs, we present the top-down realization of vertical Ge nanowires (NWs) with defect-free sidewall and perfect anisotropy. The NW patterns are transferred by a novel inductively coupled plasma reactive ion etching (ICP-RIE) technique. With optimized etching conditions, sub-60 nm diameter Ge nanowires are guaranteed while mitigating micro-trenching and under-cutting effects. To further shrink the NW diameter, digital etching is followed including multiple cycles of self-limited O2 plasma oxidation and diluted HF rinsing. O2 plasma is also utilized for surface passivation in Ge MOScaps to improve the high-k/Ge interface. These NWs form the base of vertical transistors which are simulated by TCAD tools here. The processing techniques proposed in this work provide a viable option for low power vertical Ge and GeSn NW transistors