Methodologies for statistical behavioral modeling and simulation of complex analog integrated circuits

Due to the character of the original source materials and the nature of batch digitization, quality control issues may be present in this document. Please report any quality issues you encounter to [email protected], referencing the URI of the item.Includes bibliographical references: p.99-104.Issued also on microfiche from Lange Micrographics.The objective of this thesis is to develop efficient methodologies for statistical behavioral modeling of analog integrated circuits and apply them to practical problems. Through appropriate statistical modeling, the Design for Quality (DFQ) of large analog integrated circuits can be realized. Various problems related to the statistical modeling of integrated circuits are discussed and solutions are presented. Several topics are addressed: statistical characterization and modeling of CMOS transistors, statistical i-nodeling techniques for integrated circuits, statistical behavioral modeling of analog functional blocks, and finally statistical behavioral system level modeling and simulation. A full statistical model for the behavioral parameters of an analog cell is presented. Behavioral parameter variations with respect to manufacturing process disturbances are approximated utilizing multivariate modeling techniques which allow the means, standard deviations, parameter correlations and the actual distributions to be reproduced with reasonable accuracy. Behavioral parameters can be characterized from measurements or from circuit simulation of the analog cell. Efficient statistical methods for characterization of the behavioral space are demonstrated. By combining the statistical models with an Analog Hardware Description Language (AHDL) we include statistical information in the behavioral model. Such models can then be used for simulation and yield estimation at a higher level of circuit abstraction. This procedure is demonstrated in statistical behavioral modeling of a MOSFETC notch filter, analog multiplier at the cell level, and a phase-locked loop (PLL) tunable filter at the system level. characterized behavioral MOSFET-C filter and the PLL models, relative to the circuit-level simulation is considered. The major contribution of this thesis is the improvement/application and development of three general classes of statistical modeling strategies. The first class, Basic Additive Modeling-Model (A), originally proposed in [2], where three levels of models which vary from the simple linear regression model to the complex hierarchical one, are demonstrated. The second class called Direct Modeling- Model (B), utilizes regression analysis in conjunction with the first-order sensitivity matrix based parameter screening, obtained through Propagation of Variance (POV) technique. Finally, the third technique, Reduced Space Modeling-Model (C) combines an innovative inverse Y-space mapping concept with the multivariate modeling techniques such as Principal Component Analysis and Factor Analysis. Systematic procedures for the statistical simulation of system level designs in the behavioral environment are also developed. Methodologies and statistical behavioral models developed in this thesis were subject to extensive testing which showed that the statistical design process can become more practical if such techniques are adopted