263 research outputs found
Design, simulation and fabrication of a mems in-situ contactless sensor to detect plasma induced damage during reactive ion etching
The present trend in the semiconductor industry is towards submicron devices. An inevitable process technique in achieving this is by reactive ion etching of the polysilicon gate. During RIE, the gate oxide may get damaged due to several causes. One of the main causes of the damage is the non-uniformity of the plasma. It is reported that these plasma inconsistencies are mainly due to electrode design and that they create spatial plasma potential fluctuation. These fluctuations are reported to be in the range of 10-20 Volts. By providing an in-situ monitoring of the wafers, the reliability of the device could be established. The purpose of this sensor is to detect the spatial fluctuations. It works on the principle of electrostatic forces. It is made of polysilicon (gate material) and consists of two cantilevers separated by 2μm constituting a parallel plate capacitor configuration. The design, simulation and fabrication of the sensor was carried out. The test results demonstrated that sensors with beam lengths 150μm, 200μm and 250μm deflect by 2μm at externally applied voltages of 65, 56, and 50 volts respectively. Optimized beam dimensions that would deflect by 1.2µm at an applied voltage of 20 Volts is estimated from the experimental results and has the following dimensions: length of the cantilever = 200μm, width = 2μm, the thickness = 1.6μm, and the space between the cantilevers is = 1.2μm
Control Caching : a fault-tolerant architecture for SEU mitigation in microprocessor control logic
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance devices and embedded processors. System level solutions to the challenge of fault tolerance flag errors and utilize penalty cycles to recover through the re-execution of instructions. This motivates the need for a hybrid technique providing fault detection as well as fault masking, with minimal penalty cycles for recovery from detected errors. In this research, we propose Control Caching, an architectural technique comprising of three schemes to protect the control logic of microprocessors against Single Event Upsets (SEUs). High fault coverage with relatively low hardware overhead is obtained by using both fault detection with recovery and fault masking. Control signals are classified as either static or dynamic, and static signals are further classified as opcode dependent and instruction dependent. The strategy for protecting static instruction dependent control signals utilizes a distributed cache of the history of the control bits along with the Triple Modular Redundancy (TMR) concept, while the opcode dependent control signals are protected by a distributed cache which can be used to flag errors. Dynamic signals are protected by selective duplication of datapath components. The techniques are implemented on the OpenRISC 1200 processor. Our simulation results show that fault detection with single cycle recovery is provided for 92% of all instruction executions. FPGA synthesis is performed to analyze the associated cycle time and area overheads
Inertial migration of a sphere in plane Couette flow
We study the inertial migration of a torque-free neutrally buoyant sphere in
wall-bounded plane Couette flow over a wide range of channel Reynolds numbers,
, in the limit of small particle Reynolds number\,() and
confinement ratio\,(). Here, where
denotes the separation between the channel walls, denotes the
speed of the moving wall, and is the kinematic viscosity of the Newtonian
suspending fluid; , being the sphere radius, with
. The channel centerline is found to be the only
(stable)\,equilibrium below a critical , consistent with
the predictions of earlier small- analyses. A supercritical pitchfork
bifurcation at the critical creates a pair of stable off-center
equilibria, symmetrically located with respect to the centerline, with the
original centerline equilibrium simultaneously becoming unstable. The new
equilibria migrate wallward with increasing . In contrast to the
inference based on recent computations, the aforementioned bifurcation occurs
for arbitrarily small provided is sufficiently small. An
analogous bifurcation occurs in the two-dimensional scenario, that is, for a
circular cylinder suspended freely in plane Couette flow, with the critical
being approximately
Antibodies directed to the phospho-tau peptide (residues 111-137) dissociate tau oligomers and reduce the spatial memory deficits in non-transgenic tauopathy model rats
355-359In dementia, Alzheimer’s disease (AD) is the most common type, characterized by the deposits of neurofibrillary tangles and senile plaques with concomitant deterioration in spatial memory and other cognitive functions. Till date, although no cure is available for AD, a few treatment options offer help in reducing the symptoms. In the present study, the sequence 111-137 in the distal N-terminal charge transition region of tau, harbouring the pathologically relevant phospho-serine (pSer 113) and phospho-threonine (pThr 123) (111TPpSLEDEAAGHVpTQARMVSKSKD
GTGS137) was selected as a potential immunotherapeutic peptide. Polyclonal anti-peptide antibodies raised in rabbits effectively dissociated the oligomers/aggregates of recombinant human tau in vitro. Administration of affinity purified anti-peptide antibodies to the okadaic acid induced tauopathy model rats resulted in a significant progress in spatial memory functions in Barnes maze task with concomitant reduction in p-tau levels in the hippocampal homogenates. Thus, targeting the phospho-residue sequence 111-137 in tau may be therapeutically relevant for AD and other related tauopathies. These antibodies may also have a clinical value in terms of immunosassay development for quantitation of pathology associated pSer113 and pThr 123 in AD samples
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