Design and Analysis of a High Speed, Power Efficient 8 Bit ALU Based on SOI / SON MOSFET Technology

This paper shows an overall performance comparative analysis in terms of Average Power Consumption, Average Delay and Power-Delay Product for an 8 bit Arithmetic Logic Unit (ALU) using bulk MOS, Silicon-on-Insulator (SOI) and Silicon-on-Nothing (SON) technology. The entire design is done in 32nm technology for all the three cases (Bulk, SOI & SON) and then compared. The comparisons have been carried out with the help of the simulation runs on Synopsys HSpice tool, and that clearly indicates, for lower Supply Voltages (Vdd), SOI / SON technology provides a significant reduction in Average Power Consumption, Average Delay and Power-Delay Product compared to that of Bulk MOS technology. When you are citing the document, use the following link http://essuir.sumdu.edu.ua/handle/123456789/3555

A Low-Voltage, Low-Power 4-bit BCD Adder, designed using the Clock Gated Power Gating, and the DVT Scheme

This paper proposes a Low-Power, Energy Efficient 4-bit Binary Coded Decimal (BCD) adder design where the conventional 4-bit BCD adder has been modified with the Clock Gated Power Gating Technique. Moreover, the concept of DVT (Dual-vth) scheme has been introduced while designing the full adder blocks to reduce the Leakage Power, as well as, to maintain the overall performance of the entire circuit. The reported architecture of 4-bit BCD adder is designed using 45 nm technology and it consumes 1.384 {\mu}Watt of Average Power while operating with a frequency of 200 MHz, and a Supply Voltage (Vdd) of 1 Volt. The results obtained from different simulation runs on SPICE, indicate the superiority of the proposed design compared to the conventional 4-bit BCD adder. Considering the product of Average Power and Delay, for the operating frequency of 200 MHz, a fair 47.41 % reduction compared to the conventional design has been achieved with this proposed scheme.Comment: To appear in the proceedings of 2013 IEEE International Conference on Signal Processing, Computing and Control (ISPCC,13