Lumped electro-thermal model of on-chip interconnects

The paper proposes a compact but accurate electro-thermal model of a long on-chip interconnect embedded in a ULSI circuit. The model is well suited to be interfaced with the commercially available tools employed in ICs design for interconnect parasitic extraction

A Novel Approach for Generating Dynamic Compact Models of Thermal Networks Having Large Numbers of Power Sources

A novel approach is presented for generating compact dynamic thermal networks having large numbers of power sources. The achievable accuracy of the compact model is controllable. The number of elements of the compact model linearly increases with the number of power sources