CONSIDERATION OF CONDUCTION MECHANISMS IN HIGH-K DIELECTRIC STACKS AS A TOOL TO STUDY ELECTRICALLY ACTIVE DEFECTS

In this paper conduction mechanisms which could govern the electron transport through high-k dielectrics are summarized. The influence of various factors – the type of high-k dielectric and its thickness; the doping with a certain element; the type of metal electrode as well as the measurement conditions (bias, polarity and temperature), on the leakage currents and dominant conduction mechanisms have been considered. Practical hints how to consider different conduction mechanisms and to differentiate between them are given. The paper presents an approach to assess important trap parameters from investigation of dominant conduction mechanisms

THE INFLUENCE OF TECHNOLOGY AND SWITCHING PARAMETERS ON RESISTIVE SWITCHING BEHAVIOR OF Pt/HfO2/TiN MIM STRUCTURES

Resistive switching (RS) effects in Pt/HfO2/TiN MIM capacitors have been investigated in dependence on the TiN bottom electrode engineering, deposition process, switching conditions and dielectric thickness. It is found that RS ratio depends strongly on the amount of oxygen introduced on TiN surface during interface engineering. In some structures a full recovery of conductive filament is observed within more than 100 switching cycles. RS effects are discussed in terms of different energy needed to dissociate O ions in structures with different TiN electrode treatment

Radiation Tolerance and Charge Trapping Enhancement of ALD HfO2/Al2O3 Nanolaminated Dielectrics

High-k dielectric stacks are regarded as a promising information storage media in the Charge Trapping Non-Volatile Memories, which are the most viable alternative to the standard floating gate memory technology. The implementation of high-k materials in real devices requires (among the other investigations) estimation of their radiation hardness. Here we report the effect of gamma radiation (60Co source, doses of 10 and 10 kGy) on dielectric properties, memory windows, leakage currents and retention characteristics of nanolaminated HfO2/Al2O3 stacks obtained by atomic layer deposition and its relationship with post-deposition annealing in oxygen and nitrogen ambient. The results reveal that depending on the dose, either increase or reduction of all kinds of electrically active defects (i.e., initial oxide charge, fast and slow interface states) can be observed. Radiation generates oxide charges with a different sign in O2 and N2 annealed stacks. The results clearly demonstrate a substantial increase in memory windows of the as-grown and oxygen treated stacks resulting from enhancement of the electron trapping. The leakage currents and the retention times of O2 annealed stacks are not deteriorated by irradiation, hence these stacks have high radiation tolerance

Response of Commercial P-Channel Power VDMOS Transistors to Ionizing Irradiation and Bias Temperature Stress

n this paper, the e®ects of successively applied static/pulsed negative bias temperature (NBT)stress and irradiation on commercial p-channel power vertical double-di®used metal-oxidesemiconductor (VDMOS) transistors are investigated. To further illustrate the impacts of thesestresses on the power devices, the relative contributions of gate oxide charge (Not) and interfacetraps (Nit) to threshold voltage shifts are shown and studied. It was shown that when irradi-ation without gate voltage is used, the duration of the pre-irradiation static NBT stress has aslightly larger e®ect on the radiation response of power VDMOS transistors. Regarding the factthat the investigated components are more likely to function in the dynamic mode than thestatic mode in practice, additional analysis was focused on the results obtained during thepulsed NBT stress after irradiation. For the components subjected to the pulsed NBT stressafter the irradiation, the e®ects ofNotneutralization andNitpassivation (usually related toannealing) are more enhanced than the components subjected to the static NBT stress, becauseonly a high temperature is applied during the pulse-o® state. It was observed that in devicespreviously irradiated with gate voltage applied, the decrease of threshold voltage shift is sig-ni ̄cantly greater during the pulsed NBT stress than during the static NBT stres

Peculiarities of Electric and Dielectric Behavior of Ni- or Fe-Doped ZnO Thin Films Deposited by Atomic Layer Deposition

The physical properties of ZnO can be tuned efficiently and controllably by doping with the proper element. Doping of ZnO thin films with 3D transition metals that have unpaired electron spins (e.g., Fe, Co, Ni, etc.) is of particular interest as it may enable magnetic phenomena in the layers. Atomic layer deposition (ALD) is the most advanced technique, which ensures high accuracy throughout the deposition process, producing uniform films with controllable composition and thickness, forming smooth and sharp interfaces. In this work, ALD was used to prepare Ni- or Fe-doped ZnO thin films. The dielectric and electrical properties of the films were studied by measuring the standard current–voltage (I–V), capacitance–voltage (C–V), and capacitance–frequency (C–f) characteristics at different temperatures. Spectral ellipsometry was used to assess the optical bandgap of the layers. We established that the dopant strongly affects the electric and dielectric behavior of the layers. The results provide evidence that different polarization mechanisms dominate the dielectric response of Ni- and Fe-doped films

Analysis of Conduction and Charging Mechanisms in Atomic Layer Deposited Multilayered HfO 2

Method for characterization of electrical and trapping properties of multilayered high permittivity stacks for use in charge trapping flash memories is proposed. Application of the method to the case of multilayered HfO2/Al2O3 stacks is presented. By applying our previously developed comprehensive model for MOS structures containing high-κ dielectrics on the J-V characteristics measured in the voltage range without marked degradation and charge trapping (from −3 V to +3 V), several parameters of the structure connected to the interfacial layer and the conduction mechanisms have been extracted. We found that the above analysis gives precise information on the main characteristics and the quality of the injection layer. C-V characteristics of stressed (with write and erase pulses) structures recorded in a limited range of voltages between −1 V and +1 V (where neither significant charge trapping nor visible degradation of the structures is expected to occur) were used in order to provide measures of the effect of stresses with no influence of the measurement process. Both trapped charge and the distribution of interface states have been determined using modified Terman method for fresh structures and for structures stressed with write and erase cycles. The proposed method allows determination of charge trapping and interface state with high resolution, promising a precise characterization of multilayered high permittivity stacks for use in charge trapping flash memories

A Reliability Investigation of VDMOS Transistors: Performance and Degradation Caused by Bias Temperature Stress

This study aimed to comprehensively understand the performance and degradation of both p- and n-channel vertical double diffused MOS (VDMOS) transistors under bias temperature stress. Conducted experimental investigations involved various stress conditions and annealing processes to analyze the impacts of BT stress on the formation of oxide trapped charge and interface traps, leading to threshold voltage shifts. Findings revealed meaningful threshold voltage shifts in both PMOS and NMOS devices due to stresses, and the subsequent annealing process was analyzed in detail. The study also examined the influence of stress history on self-heating behavior under real operating conditions. Additionally, the study elucidated the complex correlation between stress-induced degradation and device reliability. The insights contribute to optimizing the performance and permanence of VDMOS transistors in practical applications, advancing semiconductor technology. This study underscored the importance of considering stress-induced effects on device reliability and performance in the design and application of VDMOS transistors

Charge Storage and Reliability Characteristics of Nonvolatile Memory Capacitors with HfO2/Al2O3-Based Charge Trapping Layers

Flash memories are the preferred choice for data storage in portable gadgets. The charge trapping nonvolatile flash memories are the main contender to replace standard floating gate technology. In this work, we investigate metal/blocking oxide/high-k charge trapping layer/tunnel oxide/Si (MOHOS) structures from the viewpoint of their application as memory cells in charge trapping flash memories. Two different stacks, HfO2/Al2O3 nanolaminates and Al-doped HfO2, are used as the charge trapping layer, and SiO2 (of different thickness) or Al2O3 is used as the tunneling oxide. The charge trapping and memory windows, and retention and endurance characteristics are studied to assess the charge storage ability of memory cells. The influence of post-deposition oxygen annealing on the memory characteristics is also studied. The results reveal that these characteristics are most strongly affected by post-deposition oxygen annealing and the type and thickness of tunneling oxide. The stacks before annealing and the 3.5 nm SiO2 tunneling oxide have favorable charge trapping and retention properties, but their endurance is compromised because of the high electric field vulnerability. Rapid thermal annealing (RTA) in O2 significantly increases the electron trapping (hence, the memory window) in the stacks; however, it deteriorates their retention properties, most likely due to the interfacial reaction between the tunneling oxide and the charge trapping layer. The O2 annealing also enhances the high electric field susceptibility of the stacks, which results in better endurance. The results strongly imply that the origin of electron and hole traps is different—the hole traps are most likely related to HfO2, while electron traps are related to Al2O3. These findings could serve as a useful guide for further optimization of MOHOS structures as memory cells in NVM

Investigation of the Effects of Rapid Thermal Annealing on the Electron Transport Mechanism in Nitrogen-Doped ZnO Thin Films Grown by RF Magnetron Sputtering

Nitrogen-doped ZnO (ZnO:N) thin films, deposited on Si(100) substrates by RF magnetron sputtering in a gas mixture of argon, oxygen, and nitrogen at different ratios followed by Rapid Thermal Annealing (RTA) at 400 °C and 550 °C, were studied in the present work. Raman and photoluminescence spectroscopic analyses showed that introduction of N into the ZnO matrix generated defects related to oxygen and zinc vacancies and interstitials. These defects were deep levels which contributed to the electron transport properties of the ZnO:N films, studied by analyzing the current–voltage characteristics of metal–insulator–semiconductor structures with ZnO:N films, measured at 298 and 77 K. At the appliedtechnological conditions of deposition and subsequent RTA at 400 °C n-type ZnO:N films were formed, while RTA at 550 °C transformed the n-ZnO:N films to p-ZnO:N ones. The charge transport in both types of ZnO:N films was carried out via deep levels in the ZnO energy gap. The density of the deep levels was in the order of 1019 cm−3. In the temperature range of 77–298 K, the electron transport mechanism in the ZnO:N films was predominantly intertrap tunneling, but thermally activated hopping also took place