Study on Analog Front End of Passive UHF RFID Transponder

In this paper, an overview of passive Ultra High Frequency (UHF) Radio Frequency Identification (RFID) is presented. This literature review emphasis on the analog front end part of the RFID transponder based on several published papers conducted by previous researchers. A passive UHF RFID transponder chip design was proposed using 0.18 μm standard CMOS process. It is estimated to have power of 1μW and high efficiency that greater than 32%. This design will work in the range of frequency between 900MHz to 960MHz

Defect-Oriented Test and Design-for-Testability Technique for Resistive Random Access Memory

Resistive Random Access Memory (ReRAM) is one of the main emerging memories that has great potential to replace existing semiconductor memories. However, it cannot be denied that ReRAM prone to have defects that lead to test escape and reliability problems. Bridge defects that occurred in the memory array might cause Undefined State Faults (USFs) during read operation. USFs cause the faulty ReRAM cell difficult to be set to the desired logical value. Hence, this paper proposed a design-for-test (DfT) technique, namely Adaptive Sensing Read Voltage (ASRV) to detect the USFs that arise during three types of bridge defects injection. For this study, a faulty ReRAM was used to be tested during simulation using Silvaco EDA simulation tools and implementation of defect-oriented test. A DfT circuitry is added in the existing sense amplifier so that this memory device can operate during the normal mode and testing mode. Based on the simulation result, the proposed DfT technique will be able to detect the USFs

Laser Anneal-Induced Effects on the NBTI Degradation of Advanced-Process 45nm high-k PMOS

This paper presents the effects imposed on the reliability of advanced-process CMOS devices, specifically the NBTI degradation, subsequent to the integration of laser annealing (LA) in the process flow of a 45nm HfO2/TiN gate stack PMOS device. The laser annealing temperatures were varied from 900°C to 1350°C. The effects imposed on the NBTI degradation of the device were comprehensively analyzed in which the shifts of the threshold voltage and drain current degradation were observed. The analysis was extended to the effects of the conventional RTA as opposed to the advanced laser annealing process. It was observed that the incorporation of laser annealing in the process flow of the device enhances the NBTI degradation rate of the device, in contrast to the integration of the conventional RTA. Laser annealing subsequent to spike-anneal is observed to improve the reliability performance of the transistor at high negative biases

NBTI degradation effect on advanced-process 45 nm high-k PMOSFETs with geometric and process.

Negative bias temperature instability (NBTI) has become an important reliability concern for nano-scaled complementary metal oxide (CMOS) devices. This paper presents the effect of NBTI for a 45 nmadvanced process high-k dielectric with metal gate PMOS transistor. The device had incorporated advanced-process flow steps such as stress engineering and laser annealing in order to achieve high on-state drain current drive performance. To explore NBTI effects on an advanced-process sub-micron device, the 45 nm high-k PMOS transistor was simulated extensively with a wide range of geometric and process variations. The device was simulated at varying thicknesses in the dielectric layer, oxide interfacial layer, metal gate and polysilicon layer. In order to observe the NBTI effect on process variation, the NBTI degradation of the 45 nm advanced-process PMOS is compared with a 45 nm PMOS device which does not employ process-induced stress and incorporates the conventional rapid thermal annealing (RTA) as compared to the laser annealing process which is integrated in the advanced-process device flow. The simulation results show increasing degradation trend in terms of the drain current and threshold voltage shift when the thicknesses of the dielectric layer, oxide layer as well as the metal gate are increased

Graphene oxide for electrochemical sensing applications

By exploiting the presence of abundant carboxylic groups (–COOH) on graphene oxide (GO) and using EDC–NHS (1-ethyl-3-(3-dimethylaminopropyl) carbodiimide hydrochloride–N-hydroxysuccinimide) chemistry to covalently conjugate protein molecules, we demonstrate a novel electrochemical immunosensor for detection of antibody–antigen (Rabbit IgG–AntiRabbit IgG) interactions. The interactions were verified using Electrochemical Impedance Spectroscopy (EIS). Although GO is known to be a poor conductor, the charge transfer resistance (RP) of a GO modified glassy carbon electrode (GCE) was found to be as low as 1.26 Ω cm2. This value is similar to that obtained for reduced graphene oxide (RGO) or graphene and an order of magnitude less than bare GCE. The EIS monitored antibody–antigen interactions showed a linear increase in RP and the overall impedance of the system with increase of antibody concentration. Rabbit IgG antibodies were detected over a wide range of concentrations from 3.3 nM to 683 nM with the limit of detection (LOD) estimated to be 0.67 nM. The sensor showed high selectivity towards Rabbit IgG antibody as compared to non-complementary myoglobin. RGO modified GCE showed no sensing properties due to the removal of carboxylic groups which prevented subsequent chemical functionalization and immobilization of antigen molecules. The sensitivity and selectivity achievable by this simple label free technique hint at the possibility of GO becoming the electrode material of choice for future electrochemical sensing protocols

Micro-diaphragm performance analysis for polyimide diaphragm

This paper presents a micro-diaphragm performance analysis for optical sensor for human pulse pressure detection. The effect of diaphragm radius and diaphragm thickness on the static and frequency responses were investigated. It can be concluded that the polyimide micro-diaphragm with a radius of 90μm and thickness of 4μm has achieved the optimum performance in term of the sensitivity, flexural rigidity and resonance frequency. © 2010 IEEE

Novel ZnO nanorod films by chemical solution deposition for planar device applications

: Smooth and continuous ZnO films consisting of densely packed ZnO nanorods (NRs) were synthesized using hydro-thermo-chemical solution deposition method which can be used for electronic device fabrication. These devices would have the novelty of high performance benefiting from the unique properties of the nanomaterials and can be fabricated on these films using conventional low cost planar process, as they have very smooth surfaces. Photoluminescence measurements showed that the nanorod films have much stronger band-to-band emissions than those from discrete ZnO NRs, hence have the potential for the development of ZnO light emission diodes and lasers etc. The nanorod films have been used to fabricate large area planar surface acoustic wave devices by conventional photolithography and demonstrated two well-defined resonant peaks and their potential for large area device applications. The chemical solution deposition method is a simple, reproducible, scalable and economic method. These nanorod films are suitable for large scale production and synthesis on cost-effective substrates promising for various fields such as sensing systems, renewable energy and optoelectronic applications

Design Optimization of the graded AlGaN/GaN HEMT device performance based on material and physical dimensions

Design optimization of the traditional AlGaN/GaN HEMT device has been comprehensively conducted in achieving improved performance and current handling capability using the Synopsys’ Sentaurus TCAD tool. Varying material and physical considerations, specifically investigating the effects of graded barriers, spacer interlayer, material selection for the channel as well as study of the effects in the physical dimensions of the HEMT have been extensively carried out. Critical figure-of-merits (FOMs) specifically the DC characteristics, 2DEG concentrations and mobility of the heterostructure device have been evaluated. Significant observations include enhancement of maximum current density by 63% while the electron concentration was found to propagate by 1020 cm-3 in the channel. This work aims to provide tactical optimization to traditional HFETs, rendering its application as power amplifiers, MMICs and RADAR, which requires low noise performance and very high RF design operations. Analysis in covering the breadth and complexity of heterostructure devices has been carefully executed through extensive TCAD modelling and the end structure obtained has been optimized to provide best performance

High-isolation antenna array using SIW and realized with a graphene layer for sub-terahertz wireless applications

This paper presents the results of a study on developing an effective technique to increase the performance characteristics of antenna arrays for sub-THz integrated circuit applications. This is essential to compensate the limited power available from sub-THz sources. Although conventional array structures can provide a solution to enhance the radiation-gain performance however in the case of small-sized array structures the radiation properties can be adversely affected by mutual coupling that exists between the radiating elements. It is demonstrated here the effectiveness of using SIW technology to suppress surface wave propagations and near field mutual coupling effects. Prototype of 2x3 antenna arrays were designed and constructed on a polyimide dielectric substrate with thickness of 125 mu m for operation across 0.19-0.20 THz. The dimensions of the array were 20x13.5x0.125 mm(3). Metallization of the antenna was coated with 500 nm layer of Graphene. With the proposed technique the isolation between the radiating elements was improved on average by 22.5 dB compared to a reference array antenna with no SIW isolation. The performance of the array was enhanced by transforming the patch to exhibit metamaterial characteristics. This was achieved by embedding the patch antennas in the array with sub-wavelength slots. Compared to the reference array the metamaterial inspired structure exhibits improvement in isolation, radiation gain and efficiency on average by 28 dB, 6.3 dBi, and 34%, respectively. These results show the viability of proposed approach in developing antenna arrays for application in sub-THz integrated circuits