55 research outputs found

    Versatile experimental setup for FTJ characterization

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    Ferroelectric Tunnel Junctions (FTJ) are intriguing electron devices which can be operated as memristors and artificial synapses for hardware neural networks. In this work, two virtual–grounded amplifiers have been designed to extract the hysteretic I–V and Q–V characteristics directly, and good agreement between repeated measurements on both circuits demonstrates the accuracy and flexibility of the two setups. Optimal measurement conditions have also been assessed and, finally, wake–up, fatigue, and the preset–dependent early breakdown have been studied

    Multiple slopes in the negative differential resistance region of NbOx-based threshold switches

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    Niobium oxide devices exhibit threshold switching behavior which enables their use as selectors in memory arrays or as locally active devices for neuromorphic computing. Among the basic dynamical phenomena appearing in non-linear circuits, the oscillations generated in a relaxation oscillator, which is making use of the negative differential resistance (NDR) effect of a threshold switching device, are of special significance for the design of neuromorphic electronic systems. Here, the necessary requirements for the emergence of oscillations of this kind in a simple relaxation oscillator circuit and their influence on the shape of the measured quasi-static I-Vm characteristic of the threshold switch are examined. In the corresponding experiments multiple NDR regions were found to appear in the quasi-static I-Vm characteristic of the threshold switch concurrently with the occurrence of oscillations. The observed 'multiple NDR phenomenon' is therefore merely a measurement artefact due to the averaging effect associated to the operating principles of the source measure unit (SMU) utilized to measure the device current and voltage. In this work, we analyzed how the emergence of oscillatory behavior in the relaxation oscillator depends upon the device layer stack composition. The probability of the appearance of oscillations within a large current range can be increased by decreasing the oxygen content in the sub-stoichiometric bottom layer of a niobium oxide bi-layer stack. It is shown that this trend is caused by the resulting decrease in the value of the product between thermal capacitance and thermal resistance of the threshold switching device. Furthermore, the changed stack composition reduces the variability and changes the forming voltage, which goes hand in hand with a change of the threshold voltage

    Graph Coloring via Locally-Active Memristor Oscillatory Networks

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    This manuscript provides a comprehensive tutorial on the operating principles of a bioinspired Cellular Nonlinear Network, leveraging the local activity of NbOx memristors to apply a spike-based computing paradigm, which is expected to deliver such a separation between the steady-state phases of its capacitively-coupled oscillators, relative to a reference cell, as to unveal the classification of the nodes of the associated graphs into the least number of groups, according to the rules of a non-deterministic polynomial-hard combinatorial optimization problem, known as vertex coloring. Besides providing the theoretical foundations of the bio-inspired signal-processing paradigm, implemented by the proposed Memristor Oscillatory Network, and presenting pedagogical examples, illustrating how the phase dynamics of the memristive computing engine enables to solve the graph coloring problem, the paper further presents strategies to compensate for an imbalance in the number of couplings per oscillator, to counteract the intrinsic variability observed in the electrical behaviours of memristor samples from the same batch, and to prevent the impasse appearing when the array attains a steady-state corresponding to a local minimum of the optimization goal. The proposed Memristor Cellular Nonlinear Network, endowed with ad hoc circuitry for the implementation of these control strategies, is found to classify the vertices of a wide set of graphs in a number of color groups lower than the cardinality of the set of colors identified by traditional either software or hardware competitor systems. Given that, under nominal operating conditions, a biological system, such as the brain, is naturally capable to optimise energy consumption in problem-solving activities, the capability of locally-active memristor nanotechnologies to enable the circuit implementation of bio-inspired signal processing paradigms is expected to pave the way toward electronics with higher time and energy efficiency than state-of-the-art purely-CMOS hardware

    On Local Activity and Edge of Chaos in a NaMLab Memristor

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    Local activity is the capability of a system to amplify infinitesimal fluctuations in energy. Complex phenomena, including the generation of action potentials in neuronal axon membranes, may never emerge in an open system unless some of its constitutive elements operate in a locally active regime. As a result, the recent discovery of solid-state volatile memory devices, which, biased through appropriate DC sources, may enter a local activity domain, and, most importantly, the associated stable yet excitable subdomain, referred to as edge of chaos, which is where the seed of complexity is actually planted, is of great appeal to the neuromorphic engineering community. This paper applies fundamentals from the theory of local activity to an accurate model of a niobium oxide volatile resistance switching memory to derive the conditions necessary to bias the device in the local activity regime. This allows to partition the entire design parameter space into three domains, where the threshold switch is locally passive (LP), locally active but unstable, and both locally active and stable, respectively. The final part of the article is devoted to point out the extent by which the response of the volatile memristor to quasistatic excitations may differ from its dynamics under DC stress. Reporting experimental measurements, which validate the theoretical predictions, this work clearly demonstrates how invaluable is non-linear system theory for the acquirement of a comprehensive picture of the dynamics of highly non-linear devices, which is an essential prerequisite for a conscious and systematic approach to the design of robust neuromorphic electronics. Given that, as recently proved, the potassium and sodium ion channels in biological axon membranes are locally active memristors, the physical realization of novel artificial neural networks, capable to reproduce the functionalities of the human brainmore closely than state-of-the-art purely CMOS hardware architectures, should not leave aside the adoption of resistance switching memories, which, under the appropriate provision of energy, are capable to amplify the small signal, such as the niobium dioxide micro-scale device fromNaMLab, chosen as object of theoretical and experimental study in this work

    Novel experimental methodologies to reconcile large- and small-signal responses of Hafnium-based Ferroelectric Tunnel Junctions

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    Ferroelectric Tunnel Junctions (FTJs) are promising electron devices which can be operated as memristors able to realize artificial synapses for neuromorphic computing. In this work, after a thorough validation of the in-house-developed experimental setup, novel methodologies are devised and employed to investigate the large- and small-signal responses of FTJs, whose discrepancies have proven difficult to interpret in previous literature. Our findings convey a significant insight into the contribution of the irreversible polarization switching to the bias-dependent differential capacitance of the ferroelectric–dielectric stack

    Dynamic modeling of hysteresis-free negative capacitance in ferroelectric/dielectric stacks under fast pulsed voltage operation

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    To overcome the fundamental limit of the transistor subthreshold swing of 60 mV/dec at room temperature, the use of negative capacitance (NC) in ferroelectric materials was proposed [1]. Due to the recent discovery of ferroelectricity in CMOS compatible HfOâ‚‚ and ZrOâ‚‚ based thin films [2], [3], the promise of ultra-low power steep-slope devices seems within reach. However, concerns have been raised about switching-speed limitations and unavoidable hysteresis in NC devices [4], [5]. Nevertheless, it was shown that NC effects without hysteresis can be observed in fast pulsed voltage measurements on ferroelectric/dielectric capacitors [6], which was recently confirmed using ferroelectric Hfâ‚€.â‚… Zrâ‚€.â‚… Oâ‚‚[7], [8]. While in these works only the integrated charge after each pulse was studied, here we investigate for the first time if the transient voltage and charge characteristics are also hysteresis-free

    Evaluation of Imprint and Multi-Level Dynamics in Ferroelectric Capacitors

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    Fluorite-structured ferroelectrics are one of the most promising material systems for emerging memory technologies. However, when integrated into electronic devices, these materials exhibit strong imprint effects that can lead to a failure during writing or retention operations. To improve the performance and reliability of these devices, it is cardinal to understand the physical mechanisms underlying the imprint during operation. In this work, the comparison of First-Order Reversal Curves measurements with a new gradual switching experimental approach named "Unipolar Reversal Curves" is used to analyze both the fluid imprint and the time-dependent imprint effects within a 10 nm-thick Hf0.5Zr0.5O2 capacitor. Interestingly, the application of delay times (ranging from 100 mu s up to 10 s) between the partial switching pulses of a Unipolar Reversal Curve sequence enables analysis of the connection between the two aforementioned imprint types. Based on these results, the study finally reports a unified physical interpretation of imprint in the context of a charge injection model, which explains both types of imprint and sheds light on the dynamics of multi-level polarization switching in ferroelectrics.Multi-level ferroelectric switching depends strongly on pulse timings. A hysteresis shift along the voltage axis ("imprint") occurs when a ferroelectric device is left in a particular state. Here, different pulse sequences are adopted to investigate and explain the contrasting effects of fluid (short time scales) and time-dependent imprint (long time scales) on multi-level switching in Hf0.5Zr0.5O2 capacitors. imag

    Bridging Large-Signal and Small-Signal Responses of Hafnium-Based Ferroelectric Tunnel Junctions

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    Ferroelectric Tunnel Junctions (FTJs) op- erating as memristors are promising electron devices to realize artificial synapses for neuromorphic computing. But the understanding of their operation requires an in-depth electrical characterization. In this work, an in- house validated experimental setup is employed along with novel experimental methodologies to investigate the large-signal (LS) and small-signal (AC) responses of FTJs. For the first time to our knowledge, our exper- iments and physics-based simulations, help to explain the discrepancies between LS and AC experiments reported in previous literature

    Polarization switching and AC small-signal capacitance in Ferroelectric Tunnel Junctions

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    We here report a joint experimental and simulation analysis for large signal P-V and AC small– signal C-V curves in ferroelectric tunnel junctions. The attempt to reproduce both experimental data sets with the same model and material parameters challenges our understanding of the underlying physics, but it also helps develop a sound background for the device design

    Interplay between charge trapping and polarization switching in BEOL-compatible bilayer Ferroelectric Tunnel Junctions

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    We here report a joint experimental and theoretical analysis of polarization switching in ferroelectric tunnel junctions. Our results show that the injection and trapping of charge into the ferroelectric-dielectric stack has a large influence on the polarization switching. Our results are relevant to the physical understanding and to the design of the devices, and for both memory and memristor applications
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