Interfacing synchronous and asynchronous modules within a high-speed pipeline

Journal ArticleAbstract-This paper describes a new technique for integrating asynchronous modules within a high-speed synchronous pipeline. Our design eliminates potential metastability problems by using a clock generated by a stoppable ring oscillator, which is capable of driving the large clock load found in present day microprocessors. Using the ATACS design tool, we designed highly optimized transistor-level circuits to control the ring oscillator and generate the clock and handshake signals with minimal overhead. Our interface architecture requires no redesign of the synchronous circuitry. Incorporating asynchronous modules in a high-speed pipeline improves performance by exploiting data-dependent delay variations. Since the speed of the synchronous circuitry tracks the speed of the ring oscillator under different processes, temperatures, and voltages, the entire chip operates at the speed dictated by the current operating conditions, rather than being governed by the worst case conditions. These two factors together can lead to a significant improvement in average-case performance. The interface design is simulated using the 0.6- m HP CMOS14B process in HSPICE

The Palomar Testbed Interferometer Calibrator Catalog

The Palomar Testbed Interferometer (PTI) archive of observations between 1998 and 2005 is examined for objects appropriate for calibration of optical long-baseline interferometer observations - stars that are predictably point-like and single. Approximately 1,400 nights of data on 1,800 objects were examined for this investigation. We compare those observations to an intensively studied object that is a suitable calibrator, HD217014, and statistically compare each candidate calibrator to that object by computing both a Mahalanobis distance and a Principal Component Analysis. Our hypothesis is that the frequency distribution of visibility data associated with calibrator stars differs from non-calibrator stars such as binary stars. Spectroscopic binaries resolved by PTI, objects known to be unsuitable for calibrator use, are similarly tested to establish detection limits of this approach. From this investigation, we find more than 350 observed stars suitable for use as calibrators (with an additional $\approx 140$ being rejected), corresponding to $\gtrsim 95$ sky coverage for PTI. This approach is noteworthy in that it rigorously establishes calibration sources through a traceable, empirical methodology, leveraging the predictions of spectral energy distribution modeling but also verifying it with the rich body of PTI's on-sky observations.Comment: 100 pages, 7 figures, 7 tables; to appear in the May 2008ApJS, v176n

International Consensus Statement on Rhinology and Allergy: Rhinosinusitis

Background: The 5 years since the publication of the first International Consensus Statement on Allergy and Rhinology: Rhinosinusitis (ICAR‐RS) has witnessed foundational progress in our understanding and treatment of rhinologic disease. These advances are reflected within the more than 40 new topics covered within the ICAR‐RS‐2021 as well as updates to the original 140 topics. This executive summary consolidates the evidence‐based findings of the document. Methods: ICAR‐RS presents over 180 topics in the forms of evidence‐based reviews with recommendations (EBRRs), evidence‐based reviews, and literature reviews. The highest grade structured recommendations of the EBRR sections are summarized in this executive summary. Results: ICAR‐RS‐2021 covers 22 topics regarding the medical management of RS, which are grade A/B and are presented in the executive summary. Additionally, 4 topics regarding the surgical management of RS are grade A/B and are presented in the executive summary. Finally, a comprehensive evidence‐based management algorithm is provided. Conclusion: This ICAR‐RS‐2021 executive summary provides a compilation of the evidence‐based recommendations for medical and surgical treatment of the most common forms of RS

Interfacing Synchronous and Asynchronous Modules Within a High-Speed Pipeline

This paper describes a new technique for integrating asynchronous modules within a high-speed synchronous pipeline. Our design eliminates potential metastability problems by using a clock generated by a stoppable ring oscillator, which is capable of driving the large clock load found in present day microprocessors. Using the ATACS design tool, we designed highly optimized transistor-level circuits to control the ring oscillator and generate the clock and handshake signals with minimal overhead. Our interface architecture requires no redesign of the synchronous circuitry. Incorporating asynchronous modules in a highspeed pipeline improves performance by exploiting datadependent delay variations. Since the speed of the synchronous circuitry tracks the speed of the ring oscillator under different processes, temperatures, and voltages, the entire chip operates at the speed dictated by the current operating conditions, rather than being governed by the worst-case conditions. These two fact..