17 research outputs found

    Align_nc_rpl32_Thalictrum_Aquilegia

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    nucleotide sequence alignment of the nuclear-encoded rpl32 copies from Thalictrum and Aquilegi

    Align_infA_Aquilegia

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    nucleotide sequence alignment of nuclear and transcript copies from Aquilegi

    Align_7amino_rpl32

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    amino acid sequence alignment of the nuclear-encoded rpl32 copies from Thalictrum, Aquilegia, and Populus with three plastid-encoded copies from related specie

    Align_nc_infA_Thalictrum_Aquilegia

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    amino acid sequence alignment of the nuclear copies of rpl32 of Thalictrum and Aquilegi

    Evolution of Graphene Growth on Pt(111): From Carbon Clusters to Nanoislands

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    We study the growth of graphene on a Pt(111) surface in stages by varying the annealing temperature of the precursor hydrocarbon decomposition through an atomic-scale analysis using scanning tunneling microscopy (STM) and studying the geometry-affected electronic properties of graphene nanoislands (GNs) through scanning tunneling spectroscopy. STM reveals that graphene grows on a Pt(111) surface from dome-shaped carbon clusters to flat GNs with the intermediate stages of dome-shaped and basin-shaped hexagonal GN structures. Density functional theory calculations confirm the changes in direction of the concavity upon increase in the size of the GNs. The structural changes are also found to have a significant effect on the electronic properties. Landau levels arise from strain-induced pseudomagnetic fields because of the large curvature, and the nanoscale-size effect promotes electron confinement

    Mesostructured Hf<sub><i>x</i></sub>Al<sub><i>y</i></sub>O<sub>2</sub> Thin Films as Reliable and Robust Gate Dielectrics with Tunable Dielectric Constants for High-Performance Graphene-Based Transistors

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    We introduce a reliable and robust gate dielectric material with tunable dielectric constants based on a mesostructured Hf<sub><i>x</i></sub>Al<sub><i>y</i></sub>O<sub>2</sub> film. The ultrathin mesostructured Hf<sub><i>x</i></sub>Al<sub><i>y</i></sub>O<sub>2</sub> film is deposited on graphene <i>via</i> a physisorbed-precursor-assisted atomic layer deposition process and consists of an intermediate state with small crystallized parts in an amorphous matrix. Crystal phase engineering using Al dopant is employed to achieve HfO<sub>2</sub> phase transitions, which produce the crystallized part of the mesostructured Hf<sub><i>x</i></sub>Al<sub><i>y</i></sub>O<sub>2</sub> film. The effects of various Al doping concentrations are examined, and an enhanced dielectric constant of ∼25 is obtained. Further, the leakage current is suppressed (∼10<sup>–8</sup> A/cm<sup>2</sup>) and the dielectric breakdown properties are enhanced (breakdown field: ∼7 MV/cm) by the partially remaining amorphous matrix. We believe that this contribution is theoretically and practically relevant because excellent gate dielectric performance is obtained. In addition, an array of top-gated metal–insulator–graphene field-effect transistors is fabricated on a 6 in. wafer, yielding a capacitance equivalent oxide thickness of less than 1 nm (0.78 nm). This low capacitance equivalent oxide thickness has important implications for the incorporation of graphene into high-performance silicon-based nanoelectronics

    Self-Aligned Multichannel Graphene Nanoribbon Transistor Arrays Fabricated at Wafer Scale

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    We present a novel method for fabricating large-area field-effect transistors (FETs) based on densely packed multichannel graphene nanoribbon (GNR) arrays using advanced direct self-assembly (DSA) nanolithography. The design of our strategy focused on the efficient integration of the FET channel and using fab-compatible processes such as thermal annealing and chemical vapor deposition. We achieved linearly stacked DSA nanopattern arrays with sub-10 nm half-pitch critical dimensions (CD) by controlling the thickness of topographic Au confinement patterns. Excellent roughness values (∼10% of CD) were obtained, demonstrating the feasibility of integrating sub-10 nm GNRs into commercial semiconductor processes. Based on this facile process, FETs with such densely packed multichannel GNR arrays were successfully fabricated on 6 in. silicon wafers. With these high-quality GNR arrays, we achieved FETs showing the highest performance reported to date (an on-to-off ratio larger than 10<sup>2</sup>) for similar devices produced using conventional photolithography and block-copolymer lithography

    Graphene and Thin-Film Semiconductor Heterojunction Transistors Integrated on Wafer Scale for Low-Power Electronics

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    Graphene heterostructures in which graphene is combined with semiconductors or other layered 2D materials are of considerable interest, as a new class of electronic devices has been realized. Here we propose a technology platform based on graphene–thin-film-semiconductor–metal (GSM) junctions, which can be applied to large-scale and power-efficient electronics compatible with a variety of substrates. We demonstrate wafer-scale integration of vertical field-effect transistors (VFETs) based on graphene–In–Ga–Zn–O (IGZO)–metal asymmetric junctions on a transparent 150 × 150 mm<sup>2</sup> glass. In this system, a triangular energy barrier between the graphene and metal is designed by selecting a metal with a proper work function. We obtain a maximum current on/off ratio (<i>I</i><sub>on</sub>/<i>I</i><sub>off</sub>) up to 10<sup>6</sup> with an average of 3010 over 2000 devices under ambient conditions. For low-power logic applications, an inverter that combines complementary n-type (IGZO) and p-type (Ge) devices is demonstrated to operate at a bias of only 0.5 V

    Control of Triboelectrification by Engineering Surface Dipole and Surface Electronic State

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    Although triboelectrification is a well-known phenomenon, fundamental understanding of its principle on a material surface has not been studied systematically. Here, we demonstrated that the surface potential, especially the surface dipoles and surface electronic states, governed the triboelectrification by controlling the surface with various electron-donating and -withdrawing functional groups. The functional groups critically affected the surface dipoles and surface electronic states followed by controlling the amount of and even the polarity of triboelectric charges. As a result, only one monolayer with a thickness of less than 1 nm significantly changed the conventional triboelectric series. First-principles simulations confirmed the atomistic origins of triboelectric charges and helped elucidate the triboelectrification mechanism. The simulation also revealed for the first time where charges are retained after triboelectrification. This study provides new insights to understand triboelectrification
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