947 research outputs found

    A study on the tradition of Judo : Focusing on “qualitative thoughts on traditional Japanese values”

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    J-GLOBAL ID : 200901048993785165This study aimed to re-evaluate the diverse values of Judo from the perspective of physical techniques. It also attempted to clarify the various values in the Budo in order to further advance Judo while embracing its local and global characteristics.  The dilution of the culture of modern Judo is gaining attention as one of its problems, and the concepts of competition and victory are typical examples. However, the competitive nature of Judo is a valuable concept. Therefore, its traditional nature has to be maintained while including competitiveness. “Human development” is closely related to the tradition of Budo, and an attempt at “human development” is closely linked to the traditional idea of education in Japan. Thus, it clearly exhibits exposure to valuable concepts in conjunction with the learning of physical skills. In addition, it can be regarded as an activity that represents the culture of a “Path” that involves multifaceted growth at the same time. A discussion of aspects like that will also reveal some of the qualitative thoughts on traditional values unique to Japan.1520860078895597568application/pdfdepartmental bulletin pape

    A study on the tradition of Judo : Focusing on “qualitative thoughts on traditional Japanese values”

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    J-GLOBAL ID : 200901048993785165This study aimed to re-evaluate the diverse values of Judo from the perspective of manner. It also attempts to consider the prospect of martial arts, which respects tradition but looks ahead to further development. Budo in modern society recognizes great value in competition. However, its maturity is different compared to that as a cultural entity. Therefore, the individual is immature as a Budo athletes. The way Budo adapt to modern society should be a culture that can include such athletes, and we need someone to guide them.  Judo shows the methods and processes of education for various purposes. However, the goal of integrating those “Michi” is cultural excellence. Thus, Judo and other martial arts are systems that aim to develop maturity in cultural beings. Moreover, a new martial arts culture will continue to be created by the mature existence there. Therefore, the development potential of culture by the mutual relationship between humans and culture and universal value thinking at the core of that interaction are the traditional qualities of Budo. We will disseminate the structure and elements globally. Furthermore, efforts to popularize better Budo will be the foundation that will support the future development of the Budo.1520015653966844416application/pdfdepartmental bulletin pape

    Temperature and voltage measurement for field test using an Aging-Tolerant monitor

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    Measuring temperature and voltage (T&V) in a current VLSI is very important in guaranteeing its reliability, because a large variation of temperature or voltage in field will reduce a delay margin and makes the chip behavior unreliable. This paper proposes a novel method of T&V measurement, which can be used for variety of applications, such as field test, online test, or hot-spot monitoring. The method counts frequencies of more than one ring oscillator (RO), which composes an aging-tolerant monitor. Then, the T&V are derived from the frequencies using a multiple regression analysis. To improve the accuracy of measurement, three techniques of an optimal selection of RO types, their calibration, and hierarchical calculation are newly introduced. In order to make sure the proposed method, circuit simulation in 180-, 90-, and 45-nm CMOS technologies is performed. In the 180-nm CMOS technology, the temperature accuracy is within 0.99 °C, and the voltage accuracy is within 4.17 mV. Furthermore, some experimental results using fabricated test chips with 180-nm CMOS technology confirm its feasibility

    Temperature and Voltage Estimation Using Ring-Oscillator-Based Monitor for Field Test

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    Field test is performed in diverse environments, in which temperature varies across a wide range. As temperature affects a circuit delay greatly, accurate temperature monitors are required. They should be placed at various locations on a chip including hot spots. This paper proposes a flexible ring-oscillator-based monitor that accurately measures voltage as well as temperature at the same time. The measurement accuracy was confirmed by circuit simulation for 180 nm, 90 nm and 45 nm technologies. An experiment using test chips with 180 nm technology shows its feasibility.2014 IEEE 23rd Asian Test Symposium (ATS), 16-19 Nov. 2014, Hangzhou, Chin

    Reduction of NBTI-Induced Degradation on Ring Oscillators in FPGA

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    Ring Oscillators are used for variety of purposes to enhance reliability on LSIs or FPGAs. This paper introduces an aging-tolerant design structure of ring oscillators that are used in FPGAs. The structure is able to reduce NBTI-induced degradation in a ring oscillator\u27s frequency by setting PMOS transistors of look-up tables in an off-state when the oscillator is not working. The evaluation of a variety of ring oscillators using Altera Cyclone IV device (60nm technology) shows that the proposed structure is capable of controlling degradation level as well as reducing more than 37% performance degradation compared to the conventional oscillators.The 20th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2014), Nov 19-21, 2014, Singapor

    A Scan-Out Power Reduction Method for Multi-Cycle BIST

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    High test power in logic BIST is a serious problem not only for production test, but also for board test, system debug or field test. Many low power BIST approaches that focus on scan-shift power or capture power have been proposed. However, it is known that a half of scan-shift power is compensated by test responses, which is difficult to control in those approaches. This paper proposes a novel approach that directly reduces scan-out power by modifying some flip-flops\u27 values in scan chains at the last capture. Experimental results show that the proposed method reduces scan-out power up to 30% with little loss of test coverage.2012 IEEE 21st Asian Test Symposium, 19-22 Nov. 2012, Niigata, Japa
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