Hot carrier degradation in deep submicron n-MOS technologies

With the aggressive scaling of MOS devices hot carrier degradation continues to be a major reliability concern. The LDD technologies, which have been used to minimise the hot carrier damage in MOS devices, suffer from the spacer damage causing the drain series resistance degradation, along with the channel mobility degradation. Therefore, in order to optimise the performance and reliability of these technologies it is necessary to quantify the roles of spacer and channel damages in determining their degradation behaviour. In this thesis the hot carrier degradation behaviour of different generations of graded drain (lightly doped, mildly doped and highly doped) n-MOS technologies, designed for 5V, 3V and 2V operation is investigated. The stress time beginning from microseconds is investigated to study how the damage initiates and evolves over time. A technology dependent two-stage degradation behaviour in the measured transconductance with an early stage deviating from conventionally observed power law behaviour is reported. A methodology based on conventional extraction procedure using the L-array method is first developed to analyse the drain series resistance and the mobility degradation. For 5V technologies the analysis of the damage using this methodology shows a two-stage drain series resistance degradation with early stage lasting about lOOms. However, it is seen that the conventional series resistance and mobility degradation methodology fails to satisfactorily predict degradation behaviour of 3V and 2V technologies, resulting in unphysical decreasing extracted series resistance. It is shown that after the hot carrier stress a change in the universal mobility behaviour for channel lengths approaching quarter micron regime has a significant effect on the parameter extraction. A modified universal mobility model incorporating the effect of the interface charge is developed using the FN stress experiments. A new generalised extraction methodology modelling hot carrier stressed device as series combination of undamaged and damaged channel regions, along with the series source drain resistance is developed, incorporating the modified universal model in the damaged channel region. The new methodology has the advantage of being single device based and serves as an effective tool in evaluating. the roles of series resistance and mobility degradations for technology qualification. This is especially true for the deep submicron regime where the conventional extraction procedures are not applicable. Further, the new extraction method has the potential of being integrated into commercial device simulation tools, to accurately analyse the device degradation behaviour in deep submicron regime

Reservoir computing for temporal data classification using a dynamic solid electrolyte ZnO thin film transistor

The processing of sequential and temporal data is essential to computer vision and speech recognition, two of the most common applications of artificial intelligence (AI). Reservoir computing (RC) is a branch of AI that offers a highly efficient framework for processing temporal inputs at a low training cost compared to conventional Recurrent Neural Networks (RNNs). However, despite extensive effort, two-terminal memristor-based reservoirs have, until now, been implemented to process sequential data by reading their conductance states only once, at the end of the entire sequence. This method reduces the dimensionality, related to the number of signals from the reservoir and thereby lowers the overall performance of reservoir systems. Higher dimensionality facilitates the separation of originally inseparable inputs by reading out from a larger set of spatiotemporal features of inputs. Moreover, memristor-based reservoirs either use multiple pulse rates, fast or slow read (immediately or with a delay introduced after the end of the sequence), or excitatory pulses to enhance the dimensionality of reservoir states. This adds to the complexity of the reservoir system and reduces power efficiency. In this paper, we demonstrate the first reservoir computing system based on a dynamic three terminal solid electrolyte ZnO/Ta2O5 Thin-film Transistor fabricated at less than 100°C. The inherent nonlinearity and dynamic memory of the device lead to a rich separation property of reservoir states that results in, to our knowledge, the highest accuracy of 94.44%, using electronic charge-based system, for the classification of hand-written digits. This improvement is attributed to an increase in the dimensionality of the reservoir by reading the reservoir states after each pulse rather than at the end of the sequence. The third terminal enables a read operation in the off state, that is when no pulse is applied at the gate terminal, via a small read pulse at the drain. This fundamentally allows multiple read operations without increasing energy consumption, which is not possible in the conventional two-terminal memristor counterpart. Further, we have also shown that devices do not saturate even after multiple write pulses which demonstrates the device’s ability to process longer sequences

CYBER CRIMES IN INDIA: TRENDS AND PREVENTION

The COVID-19 virus has affected most countries in the world, India being one of them with over 19000 people infected till date. The purpose of the paper to analyse the increasing cases of cyber violations, the urgency for more robust and comprehensive cyber security measures, among other issues. Between March and April 2020, India has witnessed a staggering 86% increase in cyber-attacks. According to the UN Special Reporter, women are both disproportionately targeted by online violence and suffer disproportionately serious consequences as a result. Cybercrime has real consequences and costs. It undermines women’s wellbeing, their rights, and their progress in all aspects of life. Cyber violence results in psychological, physical, sexual or economic harm to women. Given the push towards digitisation, amongst the ongoing pandemic, more women and girls are using the internet for varied purposes including education, work, and financial transactions, amongst others. Many of these women and girls could be first-time users and/or may have a limited understanding of good practices when interacting with others in cyberspace and could be subjected to cybercrimes. No doubt the crime rate has subsided as people are staying back but online frauds have seen an upsurge. Apart from being interaction/communication interfaces, sometimes these also serve as platforms for criminal elements and eventually end up being the epicentres of immeasurable security concerns. This working from home has now become an opportunity for cybercriminals to exploit the people through e-mail scams, hacking passwords, phishing, ransom attacks, online sexual harassment, etc

A Case Study to Evaluate the Role of Trayaushnadi Vati in the Management of Madhumeha (Type 2 Diabetes Mellitus)

India is known as the diabetes capital of the world. By 2025, the country's diabetes population will have risen to 69.9 million, and by 2030, it will have risen to 80 million. This means that the developing country is anticipated to have a 266% gain. In the present study, a 35-years-old obese male patient came to the OPD with complaints of Daurbalyata (weakness), Atimutrata (increased frequency of micturition) and Atitrishna (excessive thirst) since seven days. The diagnosis leads to Madhumeha (Type 2 Diabetes mellitus) through physical findings and biochemical investigations. The treatment plan opted for was Trayaushnadi Vati with a change in diet and lifestyle. This case study emphasizes the usefulness of Ayurveda and it aims to detoxify, purify, strengthen and balance the body Dosha (regulatory functional factors of the body) of the body Dhatus (major structural components of the body) to attack the root cause and ensure complete healing. Several medicinal herbs appear to be as beneficial as traditional anti-diabetic medications in lowering HbA1c levels. To determine the benefits of prospective plant-based medicines on diabetes, rigorous trials with at least 3 months of follow-up are required

Signal Integrity Analysis in Carbon Nanotube Based Through-Silicon Via

Development of a reliable 3D integrated system is largely dependent on the choice of filler materials used in through-silicon vias (TSVs). This research paper presents carbon nanotube (CNT) bundles as prospective filler materials for TSVs and provides an analysis of signal integrity for different single- (SWCNT), double- (DWCNT), and multi-walled CNT (MWCNT) bundle based TSVs. Depending on the physical configuration of a pair of TSVs, an equivalent electrical model is employed to analyze the in-phase and out-phase delays. It is observed that, using an MWCNT bundle (with number of shells = 10), the overall in-phase delays are reduced by 96.86%, 92.33%, 78.35%, and 32.72% compared to the bundled SWCNT, DWCNT, 4-shell MWCNT, and 8-shell MWCNT, respectively; similarly, the overall reduction in out-phase delay is 85.89%, 73.38%, 45.92%, and 12.56%, respectively