Implementación de la etapa de arranque (bootstrap) de un microprocesador basado en RISC-V para el Sistema de Reconocimiento de Patrones Acústicos (SiRPA).

Proyecto de graduación (Licenciatura en Ingeniería en Electrónica) Instituto Tecnológico de Costa Rica, Escuela de Ingeniería Electrónica, 2017.In the following work, a unit of program instruction loading (hereinafter bootstrap unit) was carried on the RISC-V based microprocessor of the Acoustic Pattern Recognition System (SiRPA). At the time of the development of this project, the memory map architecture for the SiRPA project microprocessor was being restructured, so the unit to be implemented was made under the concept of using a single port SRAM as a memory bank. The unit has the communication functions, in SPI protocol, with the program source, data bus controller and the instruction program writing in memory. This system was implemented on an FPGA, in order to perform functional tests of communication with the source of the program, a micro SD card. In addition, the unit was implemented at the logic implementation level in the Synopsys tool, in 180 nm technology. Finally, the bootstrap unit is compatible with a large number of SDSC and SDHC microSD cards, which follow the protocol convention according to the SD Card Association

Siwa: a RISC-V RV32I based micro-controller for implantable medical applications

The design of Siwa1, a compact low power custom system on chip (SoC), targeted for implantable/wearable applications, is reported in this paper. Siwa is based on a RISC-V RV32I architecture. It has a centrally controlled non-pipelined structure, and it includes a control interface for an integrated sensing and stimulation device for biological tissues as well as standard communication interfaces. Siwa was developed from scratch using System Verilog, and implemented in a 180nm CMOS technology; Siwa includes a latch based register file c apable to read and write in one clock cycle with an area 30% smaller and a power consumption 25% lower with respect to an equivalent flip flop implementation; also, it has an estimated average power consumption of 70μW (48pJ/cycle) which is comparable to other micro-controllers commonly used in IMD applications.Agencia Nacional de Investigación e Innovació

Siwa: A custom RISC-V based system on chip (SOC) for low power medical applications

This work introduces the development of Siwa, a RISC-V RV32I 32-bit based core, intended as a flexible control platform for highly integrated implantable biomedical applications, and implemented on a commercial 0.18 m high voltage (HV) CMOS technology. Simulations show that Siwa can outperform commercial micro-controllers commonly used in the medical industry as control units for implantable devices, with energy requirements below the 50 pJ per clock cycle.Agencia Nacional de Investigación e Innovació