Variational capacitance modeling using orthogonal polynomial method

ABSTRACT In this paper, we propose a novel statistical capacitance extraction method for interconnects considering process variations. The new method, called statCap, is based on the spectral stochastic method where orthogonal polynomials are used to represent the statistical processes in a deterministic way. We first show how the variational potential coefficient matrix is represented in a first-order form using Taylor expansion and orthogonal decomposition. Then an augmented potential coefficient matrix, which consists of the coefficients of the polynomials, is derived. After that, corresponding augmented system is solved to obtain the variational capacitance values in the orthogonal polynomial form. Experimental results show that our method is two orders of magnitude faster than the recently proposed statistical capacitance extraction method based on the spectral stochastic collocation approac

Fetal hyperechoic kidney cohort study and a meta-analysis

Objective: To investigate the positive rate of chromosomal and monogenic etiologies and pregnancy outcomes in fetuses with hyperechoic kidney, and to provide more information for genetic counseling and prognosis evaluation.Methods: We performed a retrospective analysis of 25 cases of hyperechoic kidney diagnosed prenatal in the Second Affiliated Hospital of Harbin Medical University and Harbin Red Cross Central Hospital (January 2017–December 2022). Furthermore, we conducted a meta-analysis of a series of hyperechoic kidneys (HEK) in the literature to assess the incidence of chromosomal and monogenic etiologies, mortality, and pooled odds ratio (OR) estimates of the association between the incidence of these outcomes and other associated ultrasound abnormalities.Results: 25 fetuses of HEK were enrolled in the cohort study, including 14 with isolated hyperechoic kidney (IHK) and 11 with non-isolated hyperechoic kidney (NIHK). Chromosomal aneuploidies were detected in 4 of 20 patients (20%). The detection rate of pathogenic or suspected pathogenic copy number variations (CNVs) was 29% (4/14) for IHK and 37% (4/11) for NIHK. Whole exome sequencing (WES) was performed in 5 fetuses, and pathogenic genes were detected in all of them. The rate of termination of pregnancy was 56% in HEK. 21 studies including 1,178 fetuses were included in the meta-analysis. No case of abnormal chromosome karyotype or (intrauterine death)IUD was reported in fetuses with IHK. In contrast, the positive rate of karyotype in NIHK was 22% and that in HEK was 20%, with the ORs of 0.28 (95% CI 0.16–0.51) and 0.25, (95% CI 0.14–0.44), respectively. The positive rate of (chromosome microarray analysis) CMA in IHK was 59% and that in NIHK was 32%, with the ORs of 1.46 (95% CI 1.33–1.62) and 0.48 (95% CI, 0.28–0.85), respectively. The positive rate of monogenic etiologies in IHK was 31%, with the OR of 0.80 (95% CI 0.25–2.63). In IHK, the termination rate was 21% and neonatal mortality was 13%, with the ORs of 0.26 (95% CI, 0.17–0.40), 1.72 (95% CI, 1.59–1.86), and that in NIHK was 63%, 0.15 (95% CI, 0.10–0.24); 11%, 0.12 (95% CI, 0.06–0.26), respectively. The intrauterine mortality in NIHK group was 2%, with the OR of 0.02 (95% CI, 0.01–0.05). HNF1B variant has the highest incidence (26%) in IHK.Conclusion: The positive rate of karyotype was 20% in HEK and 22% in NIHK. The positive rate of CMA was 32% in NIHK and 59% in IHK. The positive rate of IHK monogenic etiologies was 31%. HNF1B gene variation is the most common cause of IHK. The overall fetal mortality rate of NIHK is significantly higher than that of IHK. The amount of amniotic fluid, kidney size and the degree of corticomedullary differentiation have a great impact on the prognosis, these indicators should be taken into consideration to guide clinical consultation and decision-making

Twenty Novel Disease Group-Specific and 12 New Shared Macrophage Pathways in Eight Groups of 34 Diseases Including 24 Inflammatory Organ Diseases and 10 Types of Tumors.

The mechanisms underlying pathophysiological regulation of tissue macrophage (Mφ) subsets remain poorly understood. From the expression of 207 Mφ genes comprising 31 markers for 10 subsets, 45 transcription factors (TFs), 56 immunometabolism enzymes, 23 trained immunity (innate immune memory) enzymes, and 52 other genes in microarray data, we made the following findings. (1) When 34 inflammation diseases and tumor types were grouped into eight categories, there was differential expression of the 31 Mφ markers and 45 Mφ TFs, highlighted by 12 shared and 20 group-specific disease pathways. (2) Mφ in lung, liver, spleen, and intestine (LLSI-Mφ) express higher M1 Mφ markers than lean adipose tissue Mφ (ATMφ) physiologically. (3) Pro-adipogenic TFs C/EBPα and PPARγ and proinflammatory adipokine leptin upregulate the expression of M1 Mφ markers. (4) Among 10 immune checkpoint receptors (ICRs), LLSI-Mφ and bone marrow (BM) Mφ express higher levels of CD274 (PDL-1) than ATMφ, presumably to counteract the M1 dominant status via its reverse signaling behavior. (5) Among 24 intercellular communication exosome mediators, LLSI- and BM- Mφ prefer to use RAB27A and STX3 than RAB31 and YKT6, suggesting new inflammatory exosome mediators for propagating inflammation. (6) Mφ in peritoneal tissue and LLSI-Mφ upregulate higher levels of immunometabolism enzymes than does ATMφ. (7) Mφ from peritoneum and LLSI-Mφ upregulate more trained immunity enzyme genes than does ATMφ. Our results suggest that multiple new mechanisms including the cell surface, intracellular immunometabolism, trained immunity, and TFs may be responsible for disease group-specific and shared pathways. Our findings have provided novel insights on the pathophysiological regulation of tissue Mφ, the disease group-specific and shared pathways of Mφ, and novel therapeutic targets for cancers and inflammations

Statistical Performance Characterization and Analysis of Nano-Scale VLSI Circuits

The performance of integrated circuits (IC) is becoming less predictable as technology scales to the sub-90-num regime. Disparate sources of variations stem from the manufacturing process and ultimately translate to a parametric yield loss. To improve parametric yield, efficient algorithms are required to accurately predict the performance of a circuit at the design stage. However, given the high complexity of design and the presence of a large number of correlated parameters that exhibit significant variations, traditional Monte Carlo (MC) method becomes inefficient as a large number of sampling points are required for an accurate statistical description of the circuit response. To mitigate this problem, a novel methodology for statistical performance analysis is proposed by representing statistical processes in a deterministic way to determine the key characteristics of statistical distributions. The proposed methodology has been successfully applied to statistical full-chip leakage analysis and capacitance extraction. For statistical full-chip leakage analysis, a general framework has been provided to derive the full-chip leakage currents or powers as closed form functions of process variation parameters. To the best knowledge of the author, this is the first full-chip statistical leakage analysis algorithm considering all types of spatial correlations with only linear time complexity O(N). Furthermore, it is extendable to incremental analysis for even more promising computing speed for larger problem sizes. For statistical capacitance extraction, a 3D statistical capacitance extraction method called StatCap is proposed, in which orthogonal polynomials are used to represent the statistical processes and the analytic second-order orthogonal polynomials are derived from the capacitance integrated equations to give more accurate results without loss of efficiency compared to the linear models. Experimental results show that StatCap is two orders of magnitude faster than the recently proposed statistical approach and many orders of magnitude faster than the MC. To improve parametric yield, not only efficient algorithms are required to accurately predict the performance of a circuit, but also efficient techniques are highly desirable for chip design. Toward this direction, a novel voltage binning technique is proposed in the last part of the dissertation. The proposed method makes it possible to predict maximum bin numbers required under the uniform binning scheme, and model the optimal binning scheme as a set-cover problem. To achieve the same yield as the uniform approach, the proposed method can significantly save the number of bins and only takes very small CPU time cost

Statistical Performance Characterization and Analysis of Nano-Scale VLSI Circuits

The performance of integrated circuits (IC) is becoming less predictable as technology scales to the sub-90-num regime. Disparate sources of variations stem from the manufacturing process and ultimately translate to a parametric yield loss. To improve parametric yield, efficient algorithms are required to accurately predict the performance of a circuit at the design stage. However, given the high complexity of design and the presence of a large number of correlated parameters that exhibit significant variations, traditional Monte Carlo (MC) method becomes inefficient as a large number of sampling points are required for an accurate statistical description of the circuit response. To mitigate this problem, a novel methodology for statistical performance analysis is proposed by representing statistical processes in a deterministic way to determine the key characteristics of statistical distributions. The proposed methodology has been successfully applied to statistical full-chip leakage analysis and capacitance extraction. For statistical full-chip leakage analysis, a general framework has been provided to derive the full-chip leakage currents or powers as closed form functions of process variation parameters. To the best knowledge of the author, this is the first full-chip statistical leakage analysis algorithm considering all types of spatial correlations with only linear time complexity O(N). Furthermore, it is extendable to incremental analysis for even more promising computing speed for larger problem sizes. For statistical capacitance extraction, a 3D statistical capacitance extraction method called StatCap is proposed, in which orthogonal polynomials are used to represent the statistical processes and the analytic second-order orthogonal polynomials are derived from the capacitance integrated equations to give more accurate results without loss of efficiency compared to the linear models. Experimental results show that StatCap is two orders of magnitude faster than the recently proposed statistical approach and many orders of magnitude faster than the MC. To improve parametric yield, not only efficient algorithms are required to accurately predict the performance of a circuit, but also efficient techniques are highly desirable for chip design. Toward this direction, a novel voltage binning technique is proposed in the last part of the dissertation. The proposed method makes it possible to predict maximum bin numbers required under the uniform binning scheme, and model the optimal binning scheme as a set-cover problem. To achieve the same yield as the uniform approach, the proposed method can significantly save the number of bins and only takes very small CPU time cost

Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs

Since process variation and chip performance uncertainties have become more pronounced as technologies scale down into the nanometer regime, accurate and efficient modeling or characterization of variations from the device to the architecture level have  become imperative for the successful design of VLSI chips. This book provides readers with tools for variation-aware design methodologies and computer-aided design (CAD) of VLSI systems, in the presence of process variations at the nanometer scale. It presents the latest developments for modeling and analysis, with a focus on statistical interconnect modeling, statistical parasitic extractions, statistical full-chip leakage and dynamic power analysis considering spatial correlations, statistical analysis and modeling for large global interconnects and analog/mixed-signal circuits.  Provides readers with timely, systematic and comprehensive treatments of statistical modeling and analysis of VLSI systems with a focus on interconnects, on-chip power grids and clock networks, and analog/mixed-signal circuits; Helps chip designers understand the potential and limitations of their design tools, improving their design productivity; Presents analysis of each algorithm with practical applications in the context of real circuit design; Includes numerical examples for the quantitative analysis and evaluation of algorithms presented.  Provides readers with timely, systematic and comprehensive treatments of statistical modeling and analysis of VLSI systems with a focus on interconnects, on-chip power grids and clock networks, and analog/mixed-signal circuits; Helps chip designers understand the potential and limitations of their design tools, improving their design productivity; Presents analysis of each algorithm with practical applications in the context of real circuit design; Includes numerical examples for the quantitative analysis and evaluation of algorithms presented.