SyncCharts in C

Statecharts are a well-established visual formalism for the description of reactive real-time systems. The SyncCharts dialect of Statecharts, which builds on the synchrony hypothesis, has a sound formal basis and ensures deterministic behavior. This report presents SyncCharts in C (SC), an approach on how to seamlessly and efficiently embed SyncCharts constructs into a conventional imperative programming language. SC offers deterministic concurrency and preemption via a simulation of multi-threading, inspired by reactive processing. SC can be used as a regular programming language, requiring just a C compiler; no special tools or hardware are needed. However SC's conciseness, completeness and semantic closeness to SyncCharts make it an attractive candidate in a number of other scenarios: 1) as an intermediate target language for synthesizing graphical SyncChart models into executable code, in a more traceable manner than the traditional path through Esterel; 2) as instruction set architecture for programming precision timed (PRET) or reactive architectures; or 3) as a virtual machine instruction set. A reference implementation of SC, based on light-weight C macros, is available as open source code

Top-Down Drawings of Compound Graphs

Bottom-up layout algorithms for compound graphs are suitable for presenting the microscale view of models and are often used in model-driven engineering. However, they have difficulties at the macroscale where maintaining the overview of large models becomes challenging. We propose top-down layout, which utilizes scale to hide low-level details at high zoom levels. The entire high-level view can fit into the viewport and remain readable, while the ability to zoom in to see the details is still maintained. Top-down layout is an abstract high-level layout process that can be used in conjunction with classic layout algorithms to produce visually compelling and readable diagrams of large compound graphs

Tool Support for System-Theoretic Process Analysis

Hazard analysis techniques such as System-Theoretic Process Analysis (STPA) are used to guarantee the safety of safety-critical systems. Our goal is to improve the tool support for STPA. The preliminary result is the PASTA Visual Studio Code (VSCode) Extension that provides verification checks and diagrams. PASTA uses elkjs to layout the diagrams and Sprotty to draw them. We evaluate PASTA by recreating the ROLFER analysis. In the future we plan to further evaluate whether PASTA improves upon existing tools and to add more features such as reevaluation suggestions, model checking, and support for other risk analysis techniques

The Kiel Esterel Processor - A Semi-Custom, Configurable Reactive Processor

The synchronous language Esterel is an established language for developing reactive systems. It gives an abstract, well-defined and executable description of the application, and can be synthesized into hardware and software. Typically, an Esterel program is first translated into other, lower-level languages (such as VHDL or C), and then compiled further. However, there is also the alternative of executing Esterel-like instructions directly. For example, in the REFLIX and RePIC projects, Roop et al. have augmented traditional processors with custom hardware to execute Esterel instructions. This patch strategy is a convenient approach, but has some shortages. We present the Kiel Esterel Processor (KEP), a semi-custom, configurable reactive processor for the direct execution of Esterel programs. It consists of a reactive core and scalable peripheral elements. KEP supports standard Esterel statements directly, except (so far) for the concurrency operator. Valued signals and counter functions in Esterel statements are supported by KEP. Due to its control path and its cooperation with elements, KEP obeys exact Esterel (preemption and priority) rules, including for example abort/weak abort (nests)

KEP2 (Kiel Esterel Processor 2): The Esterel Processor

The concurrent synchronous language Esterel allows to program reactive systems in an abstract, concise manner. Several preemption operators, such as suspension or weak and strong abortion, are provided to directly express reactive behavior with a deterministic, mathematically precise semantics, without the inherent need for the support of a resource-consuming, typically non-deterministic operating system. An Esterel program is typically first translated into other, non-synchronous high-level languages, such as VHDL or C, and then compiled further into hardware or software. Another approach that has been proposed recently is the direct execution of Esterel-like instructions with a customized processor, which promises the flexibility of a software solution with an efficiency close to a hardware implementation. However, the instruction sets and implementations of the processor architectures proposed so far still have some limitations regarding their completeness, efficiency, and adherence to the original Esterel semantics. This paper presents a novel processor architecture, the Kiel Esterel Processor, which addresses these shortcomings. In particular, it provides a complete, semantically accurate implementation of the Esterel preemption primitives, most of which can be expressed directly with a single machine instruction

Wrapping layered graphs

We present additions to the widely-used layout method for directed acyclic graphs of Sugiyama et al. [16] that allow to better utilize a prescribed drawing area. The method itself partitions the graph's nodes into layers. When drawing from top to bottom, the number of layers directly impacts the height of a resulting drawing and is bound from below by the graph's longest path. As a consequence, the drawings of certain graphs are significantly taller than wide, making it hard to properly display them on a medium such as a computer screen without scaling the graph's elements down to illegibility. We address this with the Wrapping Layered Graphs Problem (WLGP), which seeks for cut indices that split a given layering into chunks that are drawn side-by-side with a preferably small number of edges wrapping backwards. Our experience and a quantitative evaluation indicate that the proposed wrapping allows an improved presentation of narrow graphs, which occur frequently in practice and of which the internal compiler representation SCG is one example

Removing Cycles in Esterel Programs

Programs written in the synchronous programming language Esterel may contain statically cyclic dependencies of signals, which inhibits the application of certain compilation approaches that rely on static scheduling. This talk proposes an algorithm which, given a constructive synchronous program, performs a semantics-preserving source-level code transformation that removes cyclic signal dependencies. The transformation exploits the monotonicity of constructive programs, and is illustrated in the context of Esterel, but should be applicable to other synchronous languages as well

Preserving Order during Crossing Minimization in Sugiyama Layouts

The Sugiyama algorithm, also known as the layered algorithm or hierarchical algorithm, is an established algorithm to produce crossing-minimal drawings of graphs. It does not, however, consider an initial order of the vertices and edges. We show how ordering real vertices, dummy vertices, and edge ports before crossing minimization may preserve the initial order given by the graph without compromising, on average, the quality of the drawing regarding edge crossings. Even for solutions in which the initial graph order produces more crossings than necessary or the vertex and edge order is conflicting, the proposed approach can produce better crossing-minimal drawings than the traditional approach

A Concurrent Reactive Esterel Processor Based on Multi-Threading

Esterel is a concurrent synchronous language for developing reactive systems. Classically, Esterel programs are either compiled into software, such as a C program that is then executed on a standard microprocessor, or into hardware. An alternative approach, which tries to combine the efficiency of a software solution with an efficiency close to a hardware solution, is the reactive processing approach, where the Esterel program is executed on a specialized processor. A principal difficulty when compiling onto a reactive processor is the faithful, efficient implementation of concurrency. One approach for implementing concurrency is multiprocessing, where sequential reactive processors are replicated and tightly synchronized to achieve concurrency. This allows concurrency at the top level; however, it is not obvious how this approach supports the arbitrary nesting of preemption and concurrency that is permitted in Esterel. This paper presents a novel reactive processor architecture, the Multi-threaded Esterel Processor (MEP), which overcomes this limitation and also scales well to large degrees of concurrency. Rather than replicating sequential processors, the MEP combines a single main processing element with independent control units that implement the concurrency and preemption operators and that allow the arbitrary combination of these operators in the executed program

Enhancing Graphical Model-Based System Design: An Avionics Case Study

Graphical model-based system design is very appealing. However, there exist many different formalisms, with different semantics---as far as they do have well-defined semantics---and differing capabilities of the accompanying tools. In this paper, we present a case study from the avionics domain and report on the experiences in using different modeling languages and tools. The focus here is on the pragmatics of modeling, i. e., the practical process of building and inspecting graphical models. The underlying application is a high-lift ï¬ap system, which is highly safety-critical and served as a demonstrator within the Dependable Embedded Components and Systems (DECOS) project that explored the design of distributed dependable systems build on time-triggered architectures. Specifically, we compare a realization in the Safety Critical Application Development Environment (SCADE), a commercial tool from Esterel-Technologies, with a design in the Kiel Integrated Environment for Layout (KIEL), a research tool that allows to explore novel model handling paradigms. Hence we compare traditional graphical drag-and-drop WYSIWYG modeling with alternative, productivity enhancing approaches. We conclude with a brief outlook on future extensions which will tightly integrate with existing tools based on the Eclipse platform