Digital Transformation

The amount of literature on Digital Transformation is staggering—and it keeps growing. Why, then, come out with yet another such document? Moreover, any text aiming at explaining the Digital Transformation by presenting a snapshot is going to become obsolete in a blink of an eye, most likely to be already obsolete at the time it is first published. The FDC Initiative on Digital Reality felt there is a need to look at the Digital Transformation from the point of view of a profound change that is pervading the entire society—a change made possible by technology and that keeps changing due to technology evolution opening new possibilities but is also a change happening because it has strong economic reasons. The direction of this change is not easy to predict because it is steered by a cultural evolution of society, an evolution that is happening in niches and that may expand rapidly to larger constituencies and as rapidly may fade away. This creation, selection by experimentation, adoption, and sudden disappearance, is what makes the whole scenario so unpredictable and continuously changing.The amount of literature on Digital Transformation is staggering—and it keeps growing. Why, then, come out with yet another such document? Moreover, any text aiming at explaining the Digital Transformation by presenting a snapshot is going to become obsolete in a blink of an eye, most likely to be already obsolete at the time it is first published. The FDC Initiative on Digital Reality felt there is a need to look at the Digital Transformation from the point of view of a profound change that is pervading the entire society—a change made possible by technology and that keeps changing due to technology evolution opening new possibilities but is also a change happening because it has strong economic reasons. The direction of this change is not easy to predict because it is steered by a cultural evolution of society, an evolution that is happening in niches and that may expand rapidly to larger constituencies and as rapidly may fade away. This creation, selection by experimentation, adoption, and sudden disappearance, is what makes the whole scenario so unpredictable and continuously changing

Development of 3.3V flash ZE²PROM cell and array

grantor: University of TorontoMost of the conventional flash E2PROM cells have major limitations for low voltage applications and suffer from slow programming speeds. This thesis describes a Zener based MOS flash memory cell (ZE 2PROM), programmed by hot electrons generated by a heavily doped reverse biased p+n+ junction attached to the drain. The Zener based programming method provides a practical solution to some of the limitations of conventional channel hot electron programming method. This cell operates with a single supply of 3.3V and achieves an order of magnitude reduction of programming time compared to conventional flash memory cells. The reduced Zener breakdown current also enables many bits to be programmed simultaneously. The cell can be implemented in a NOR type memory array. It uses an orthogonal write technique to achieve fast programming with low power dissipation and reduced drain disturbance. The modeling of the charge transfer behavior of the ZE2PROM cell is investigated using 2-D device simulations to specify the charging and discharging of the floating gate during programming and erasing. Experimental ZE2PROM arrays were implemented in a 0.8 m m lithography CMOS process flow in which the n-LDD step was replaced with a one sided p+ boron implant with a doping level of ~ 1019cm-3. This minor change to a standard CMOS process, makes the concept highly attractive for embedded memory applications. A programming time of 850ns at 3.3V supply was achieved on fabricated test devices.Ph.D

Foreword Special Issue on Characterization of Nano CMOS Variability by Simulation and Measurements

The five invited papers and 11 contributed papers in this special issue discuss topics such as process variation, device variability, hierarchical modeling tools, and address challenges such as device mismatch and SRAM noise margin variability