Test item taxonomy based of functional criteria

There are many taxonomies that try to classify and apply some consistency to the very many item types currently in existence. They all have various limitations, however, such as ambiguous classification criteria, little discrimination between format types, and referring almost exclusively to pen-and-paper or screen-based items. This paper aims to overcome these limitations by proposing a new item format taxonomy based on functional criteria. Current classifications are reviewed, the criteria they are based on are examined and their limitations are identified. The proposed alternative classification identifies four essential components of items according to function: the structure of the included content, the device used for transmission of the question to the examinee, the device for receiving the response, and the instructions to the examinee about how to understand and respond to the item. The combination of different facets of these four components allows any format of item to be classified, both existing formats and those that may appear in the future. In addition to systematically and coherently classifying items, this new taxonomy may also be of great utility in the construction and research of new items. The proposed model is illustrated by examples showing how specific items are classified, using a checklist as a guide.Ministerio de Economía y Competitividad de España PSI2014-56114-PMinisterio de Economía y Competitividad de España PSI2017-85724-

Labor productivity: a comparative analysis of the European Union and United States, for the period 1994-2007

This Working Ppaer confirms that labor productivity in the European economies has continued to slow down in recent years. U.S. productivity growth has been higher than in the EU, but only since 2001. At the same time, both economies have modified previous employment performance: EU employment growth is now higher than in U.S. This article proposes that productivity growth be explained by demand dynamics, and investment in particular, not forgetting the influence of employment, along with other factors such as new technologies.Labor Productivity; Demand; Employment; Labor Markets; Economic Sectors

DSP based platform for an enhanced HF channel simulator

With the aim of improving existing tools for testing new HF transmission systems, this article describes a modification of the basic Watterson (1970) model which can be implemented without any extra added complexity with a general purpose DSP card running an a PC IBM compatible.Peer ReviewedPostprint (published version

A Reuse-based framework for the design of analog and mixed-signal ICs

Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits (ICs) under stringent time-to-market (TTM) requirements is lagging behind integration capacity, so far keeping pace with still valid Moore's Law. The resulting gap is threatening with slowing down such a phenomenal growth. The design community believes that it is only by means of powerful CAD tools and design methodologies -and, possibly, a design paradigm shift-that this design gap can be bridged. In this sense, reuse-based design is seen as a promising solution, and concepts such as IP Block, Virtual Component, and Design Reuse have become commonplace thanks to the significant advances in the digital arena. Unfortunately, the very nature of analog and mixed-signal (AMS) design has hindered a similar level of consensus and development. This paper presents a framework for the reuse-based design of AMS circuits. The framework is founded on three key elements: (1) a CAD-supported hierarchical design flow that facilitates the incorporation of AMS reusable blocks, reduces the overall design time, and expedites the management of increasing AMS design complexity; (2) a complete, clear definition of the AMS reusable block, structured into three separate facets or views: the behavioral, structural, and layout facets, the two first for top-down electrical synthesis and bottom-up verification, the latter used during bottom-up physical synthesis; (3) the design for reusability set of tools, methods, and guidelines that, relying on intensive parameterization as well as on design knowledge capture and encapsulation, allows to produce fully reusable AMS blocks. A case study and a functional silicon prototype demonstrate the validity of the paper's proposals.Ministerio de Educación y Ciencia TEC2004-0175

Geometrically-constrained, parasitic-aware synthesis of analog ICs

In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as much as possible. More specifically, spins between electrical and physical synthesis should be reduced for this is a very time-consuming task: if circuit performance including layout-induced degradations proves unacceptable, a re-design cycle must be entered, and electrical, physical, or both synthesis processes, would have to be repeated. It is also worth noting that if geometric optimization (e.g., area minimization) is undertaken after electrical synthesis, it may add up as another source of unexpected degradation of the circuit performance due to the impact of the geometric variables (e.g., transistor folds) on the device and the routing parasitic values. This awkward scenario is caused by the complete separation of said electrical and physical synthesis, a design practice commonly followed so far. Parasitic-aware synthesis, consisting in including parasitic estimates to the circuit netlist directly during electrical synthesis, has been proposed as solution. While most of the reported contributions either tackle parasitic-aware synthesis without paying special attention to geometric optimization or approach both issues only partially, this paper addresses the problem in a unified way. In what has been called layout-aware electrical synthesis, a simulation-based optimization algorithm explores the design space with geometric variables constrained to meet certain user-defined goals, which provides reliable estimates of layout-induced parasitics at each iteration, and, thereby, accurate evaluation of the circuit ultimate performance. This technique, demonstrated here through several design examples, requires knowing layout details beforehand; to facilitate this, procedural layout generation is used as physical synthesis approach due to its rapidness and ability to capture analog layout know-how.Ministerio de Educación y Ciencia TEC2004-0175

The Balanced Innovation Model. The case of Crowdfunding platforms.

Purpose – The paper aims to analyze balanced centricity (Gummesson, 2008) as an institutional arrangement (Vargo and Lusch, 2016) fostering the innovation process by taking out the customer from the central positioning to involve other business partners. The practices of actors’ service ecosystem are put in focus (Russo Spena et al., 2017; Tronvoll, 2017). Methodology–. Qualitative case study research was conducted using different methods of data generation including personal interviews and netnography analysis of the crowdfunding context. fifteen cases on the crowdfunding context from five different platforms and in four different countries were analysed. Research limitations/implications (if applicable) –The empirical approach considers fifteensuccess cases on the crowdfunding context in four different platforms and countries. Other contexts, different from the crowdfunding and other countries would be useful to add new perspectives to the theory development. Originality– The present paper defines a theoretical Model for Balanced Innovation, that brings together the concepts “Balanced Centricity”, “Innovation” and “Service ecosystems”. Hitherto, it offers a basis for designing systems of value co-creation which aims to facilitate innovation through institutionalization and value co-creation in viable service ecosystems.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech

ADAPTIVE CO-MANAGEMENT OF URBAN FORESTS: MONITORING REFORESTATION PROGRAMS IN MEXICO CITY.

Aiming to maintain or increase the indispensable socio-ecological benefits provided by urban forests, cities of the world have adequate urban forestry to take advantage of new technologies and political arrangements. Cooperation among different actors has become a trend to address urban forests’ most pressing management issues, such as reforestation monitoring and the creation of tree inventories. This management approach has been conceptualized as adaptive co-management (ACM) in European and North American cities. Intending to advance the academic efforts to understand ACM, this article presents a spatial and statistical analysis of the distribution of trees monitored in Mexico City. The analysis indicated that the number of urban trees monitored is very low and inequitably distributed in the city. The implementation of ACM for environmental management of the urban forest, using the participatory tool of Naturalista. The tool demonstrated to have much potential in the operationalization of inclusive reforestation programs, particularly in monitoring urban trees recently planted. The implementation of ACM and citizens' science programs are discussed and recommended as a promising urban environmental management approach

On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis

Accelerating the synthesis of increasingly complex analog integrated circuits is key to bridge the widening gap between what we can integrate and what we can design while meeting ever-tightening time-to-market constraints. It is a well-known fact in the semiconductor industry that such goal can only be attained by means of adequate CAD methodologies, techniques, and accompanying tools. This is particularly important in analog physical synthesis (a.k.a. layout generation), where large sensitivities of the circuit performances to the many subtle details of layout implementation (device matching, loading and coupling effects, reliability, and area features are of utmost importance to analog designers), render complete automation a truly challenging task. To approach the problem, two directions have been traditionally considered, knowledge-based and optimization-based, both with their own pros and cons. Besides, recently reported solutions oriented to speed up the overall design flow by means of reuse-based practices or by cutting off time-consuming, error-prone spins between electrical and layout synthesis (a technique known as layout-aware synthesis), rely on a outstandingly rapid yet efficient layout generation method. This paper analyses the suitability of procedural layout generation based on templates (a knowledge-based approach) by examining the requirements that both layout reuse and layout-aware solutions impose, and how layout templates face them. The ability to capture the know-how of experienced layout designers and the turnaround times for layout instancing are considered main comparative aspects in relation to other layout generation approaches. A discussion on the benefit-cost trade-off of using layout templates is also included. In addition to this analysis, the paper delves deeper into systematic techniques to develop fully reusable layout templates for analog circuits, either for a change of the circuit sizing (i.e., layout retargeting) or a change of the fabrication process (i.e., layout migration). Several examples implemented with the Cadence's Virtuoso tool suite are provided as demonstration of the paper's contributions.Ministerio de Educación y Ciencia TEC2004-0175

The role of network ties in reaching radical innovation

The purpose of this paper is to analyze how institutions can facilitate or inhibit radical innovation. The authors maintain that organizational radical innovation is necessary to maintain a competitive advantage and evolve in the market place, and institutions are the basis of this innovation. From an innovation and Service Dominant Logic perspective, the authors propose network ties to be a determining factor for the achievement of innovation through institutionalization in the University knowledge management context.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tec