Process for forming layers on substrates

The present invention is generally directed to various processes and systems for forming layers and coatings on substrates, such as semiconductor wafers and solar cells. In one embodiment, the process of the present invention is directed to forming a layer on a substrate from a liquid precursor. The liquid precursor is atomized and exposed to light energy. Besides light energy, the parent material may also be exposed to an electric field and/or to sonic energy. In an alternative embodiment of the present invention a stress measurement device monitors stress in the substrate as a layer is deposited on the substrate. This stress measurement information is then sent to a controller for automatically controlling the amount of energy, such as light energy being emitted onto the substrate

Systems, methods and computer program products for prediction of defect-related failures in integrated circuits

Systems, methods and computer program products for predicting defect-related failures in integrated circuits produced by an integrated circuit fabrication process identify objects in a circuit layout for the integrated circuit design, each object having a location in the circuit layout and a reliability connectivity in the integrated circuit design. Sample object defects are generated for the identified objects, each sample object defect representing a defect produced in an object by the integrated circuit fabrication process and having a defect magnitude associated therewith. An accelerated life defect influence model is identified for each sample object defect, relating the lifetime of an object to the defect magnitude of a defect in the object. Sample object lifetimes are generated from the defect magnitudes associated with the sample object defects according to the corresponding identified accelerated life defect influence models. A prediction of the reliability of integrated circuits is generated from the sample object lifetimes according to the reliability connectivity of the associated objects in the integrated circuit design. Preferably, the accelerated life defect influence models include log-linear regression models, which may include deterministic object lifetime functions, each relating the defect magnitude of the at least one sample object defect to one object lifetime value, and log-linear object lifetime distributions, each relating the defect magnitude of a sample object defect to a plurality of object lifetime values