Logical strength of complexity theory and a formalization of the PCP theorem in bounded arithmetic

We present several known formalizations of theorems from computational complexity in bounded arithmetic and formalize the PCP theorem in the theory PV1 (no formalization of this theorem was known). This includes a formalization of the existence and of some properties of the (n,d,{\lambda})-graphs in PV1

Feasibly constructive proofs of succinct weak circuit lower bounds

We ask for feasibly constructive proofs of known circuit lower bounds for explicit functions on bit strings of length n. In 1995 Razborov showed that many can be proved in PV1, a bounded arithmetic formalizing polynomial time reasoning. He formalized circuit lower bound statements for small n of doubly logarithmic order. It is open whether PV1 proves known lower bounds in succinct formalizations for n of logarithmic order. We give such proofs in APC1, an extension of PV1 formalizing probabilistic polynomial time reasoning: for parity and AC0, for mod q and AC0[p] (only for n slightly smaller than logarithmic), and for k-clique and monotone circuits. We also formalize Razborov and Rudich’s natural proof barrier. We ask for short propositional proofs of circuit lower bounds expressed succinctly by propositional formulas of size nO(1) or at least much smaller than the 2O(n) size of the common “truth table” formula. We discuss two such expressions: one via feasible functions witnessing errors of circuits, and one via the anticheckers of Lipton and Young 1994. Our APC1 formalizations yield conditional upper bounds for the succinct formulas obtained by witnessing: we get short Extended Frege proofs from general circuit lower bounds expressed by the common “truth-table” formulas. We also show how to construct in quasipolynomial time propositional proofs of quasipolynomial size tautologies expressing AC0[p] quasipolynomial size lower bounds; these proofs are in Jerábek’s system WF.Peer ReviewedPostprint (author's final draft

Frege systems for quantified Boolean logic

We define and investigate Frege systems for quantified Boolean formulas (QBF). For these new proof systems, we develop a lower bound technique that directly lifts circuit lower bounds for a circuit class C to the QBF Frege system operating with lines from C. Such a direct transfer from circuit to proof complexity lower bounds has often been postulated for propositional systems but had not been formally established in such generality for any proof systems prior to this work. This leads to strong lower bounds for restricted versions of QBF Frege, in particular an exponential lower bound for QBF Frege systems operating with AC0[p] circuits. In contrast, any non-trivial lower bound for propositional AC0[p]-Frege constitutes a major open problem. Improving these lower bounds to unrestricted QBF Frege tightly corresponds to the major problems in circuit complexity and propositional proof complexity. In particular, proving a lower bound for QBF Frege systems operating with arbitrary P/poly circuits is equivalent to either showing a lower bound for P/poly or for propositional extended Frege (which operates with P/poly circuits). We also compare our new QBF Frege systems to standard sequent calculi for QBF and establish a correspondence to intuitionistic bounded arithmetic.This research was supported by grant nos. 48138 and 60842 from the John Templeton Foundation, EPSRC grant EP/L024233/1, and a Doctoral Prize Fellowship from EPSRC (third author). The second author was funded by the European Research Council under the European Union’s Seventh Framework Programme (FP7/2007–2013)/ERC grant agreement no. 279611 and under the European Union’s Horizon 2020 Research and Innovation Programme/ERC grant agreement no. 648276 AUTAR. The fourth author was supported by the Austrian Science Fund (FWF) under project number P28699 and by the European Research Council under the European Union’s Seventh Framework Programme (FP7/2007-2014)/ERC Grant Agreement no. 61507. Part of this work was done when Beyersdorff and Pich were at the University of Leeds and Bonacina at Sapienza University Rome.Peer ReviewedPostprint (published version

From proof complexity to circuit complexity via interactive protocols

Folklore in complexity theory suspects that circuit lower bounds against NC1 or P/poly, currently out of reach, are a necessary step towards proving strong proof complexity lower bounds for systems like Frege or Extended Frege. Establishing such a connection formally, however, is already daunting, as it would imply the breakthrough separation NEXP ⊈ P/poly, as recently observed by Pich and Santhanam [Pich and Santhanam, 2023]. We show such a connection conditionally for the Implicit Extended Frege proof system (iEF) introduced by Krajíček [Krajíček, 2004], capable of formalizing most of contemporary complexity theory. In particular, we show that if iEF proves efficiently the standard derandomization assumption that a concrete Boolean function is hard on average for subexponential-size circuits, then any superpolynomial lower bound on the length of iEF proofs implies #P ⊈ FP/poly (which would in turn imply, for example, PSPACE ⊈ P/poly). Our proof exploits the formalization inside iEF of the soundness of the sum-check protocol of Lund, Fortnow, Karloff, and Nisan [Lund et al., 1992]. This has consequences for the self-provability of circuit upper bounds in iEF. Interestingly, further improving our result seems to require progress in constructing interactive proof systems with more efficient provers

Razborov-Rudich theory and bounded arithmetic

Department of AlgebraKatedra algebryFaculty of Mathematics and PhysicsMatematicko-fyzikální fakult

Logical strength of complexity theory and a formalization of the PCP theorem in bounded arithmetic

We present several known formalizations of theorems from computationalcomplexity in bounded arithmetic and formalize the PCP theorem in the theoryPV1 (no formalization of this theorem was known). This includes a formalizationof the existence and of some properties of the (n,d,{\lambda})-graphs in PV1

Complexity theory in Feasible Mathematics

Title: Complexity Theory in Feasible Mathematics Author: Ján Pich Department: Department of Algebra Supervisor: Prof. RNDr. Jan Krajíček, DrSc., MAE Abstract: We study the provability of statements and conjectures from Complex- ity Theory in Bounded Arithmetic. First, modulo a hardness assumption, we show that theories weaker in terms of provably total functions than Buss's theory S1 2 cannot prove nk -size circuit lower bounds for SAT formalized as a Σb 2-formula LB(SAT, nk ). In particular, the true universal first-order theory in the language containing names for all uniform NC1 algorithms denoted TNC1 does not prove LB(SAT, n4kc ) where k ≥ 1, c ≥ 2 unless each function f ∈ SIZE(nk ) can be approximated by formulas Fn of subexponential size 2O(n1/c) with subexponential advantage: Px∈{0,1}n [Fn(x) = f(x)] ≥ 1/2 + 1/2O(n1/c) . Unconditionally, V 0 does not prove quasipolynomial nlog n -size circuit lower bounds for SAT. Considering upper bounds, we prove the PCP theorem in Cook's theory PV1. This includes a formalization of the (n, d, λ)-graphs in PV1. A consequence of the result is that Extended Frege proof system admits p-size proofs of tautologies encoding the PCP theorem. Keywords: Circuit Lower Bounds, Bounded Arithmetic, The PCP theore

Teória zložitosti v dosiahnuteľnej matematike

Title: Complexity Theory in Feasible Mathematics Author: Ján Pich Department: Department of Algebra Supervisor: Prof. RNDr. Jan Krajíček, DrSc., MAE Abstract: We study the provability of statements and conjectures from Complex- ity Theory in Bounded Arithmetic. First, modulo a hardness assumption, we show that theories weaker in terms of provably total functions than Buss's theory S1 2 cannot prove nk -size circuit lower bounds for SAT formalized as a Σb 2-formula LB(SAT, nk ). In particular, the true universal first-order theory in the language containing names for all uniform NC1 algorithms denoted TNC1 does not prove LB(SAT, n4kc ) where k ≥ 1, c ≥ 2 unless each function f ∈ SIZE(nk ) can be approximated by formulas Fn of subexponential size 2O(n1/c) with subexponential advantage: Px∈{0,1}n [Fn(x) = f(x)] ≥ 1/2 + 1/2O(n1/c) . Unconditionally, V 0 does not prove quasipolynomial nlog n -size circuit lower bounds for SAT. Considering upper bounds, we prove the PCP theorem in Cook's theory PV1. This includes a formalization of the (n, d, λ)-graphs in PV1. A consequence of the result is that Extended Frege proof system admits p-size proofs of tautologies encoding the PCP theorem. Keywords: Circuit Lower Bounds, Bounded Arithmetic, The PCP theoremSkúmame dokázateľnosť tvrdení z teórie zložitosti v obmedzenej aritmetike. Za istých zložitostných predpokladov ukážeme, že teórie so slabšími dosvedčovacími vlastnosťami než $S^1_2$ nemôžu dokázať spodné odhady veľkosti $n^k$ na booleovské obvody pre SAT vyjadrené formulou $LB(SAT,n^k)$. Špeciálne, prvorádová teória pravdivých univerzálnych tvrdení v jazyku obsahujúcom symboly pre všetky uniformné $NC^1$ algoritmy nedokazuje $LB(SAT,n^{4kc})$ pre $k\geq 1,c\geq 2$ predpokladajúc existenciu funkcie $f\in SIZE(n^k)$, ktorá nie je aproximovateľná formulami $F_n$ subexponenciálnej veľkosti $2^{O(n^{1/c})}$ so subexponenciálnou výhodou: $P_{x\in\{0,1\}^n}[F_n(x)=f(x)]\geq 1/2+1/2^{O(n^{1/c})}$. Bezpodmienečne, teória $V^0$ nedokazuje kvazipolynomiálne spodné odhady na booleovské obvody pre SAT. Čo sa týka horných odhadov, dokážeme PCP vetu v Cookovej teórii $PV_1$. To zahŕňa formalizáciu $(n,d,\lambda)$-grafov v $PV_1$. Ako dôsledok dostaneme polynomiálne krátke Extended Frege dôkazy tautologií vyjdadrujúcich PCP vetu. Powered by TCPDF (www.tcpdf.org)Katedra algebryDepartment of AlgebraFaculty of Mathematics and PhysicsMatematicko-fyzikální fakult