Structure and relaxations in liquid and amorphous Selenium

We report a molecular dynamics simulation of selenium, described by a three-body interaction. The temperatures T_g and T_c and the structural properties are in agreement with experiment. The mean nearest neighbor coordination number is 2.1. A small pre-peak at about 1 AA^-1 can be explained in terms of void correlations. In the intermediate self-scattering function, i.e. the density fluctuation correlation, classical behavior, alpha- and beta-regimes, is found. We also observe the plateau in the beta-regime below T_g. In a second step, we investigated the heterogeneous and/or homogeneous behavior of the relaxations. At both short and long times the relaxations are homogeneous (or weakly heterogeneous). In the intermediate time scale, lowering the temperature increases the heterogeneity. We connect these different domains to the vibrational (ballistic), beta- and alpha-regimes. We have also shown that the increase in heterogeneity can be understood in terms of relaxations

Tunnelling defect nanoclusters in hcp 4He crystals: alternative to supersolidity

A simple model based on the concept of resonant tunnelling clusters of lattice defects is used to explain the low temperature anomalies of hcp 4He crystals (mass decoupling from a torsional oscillator, shear modulus anomaly, dissipation peaks, heat capacity peak). Mass decoupling is a result of an internal Josephson effect: mass supercurrent inside phase coherent tunnelling clusters. Quantitative results are in reasonable agreement with experiments.Comment: 13 pages, 5 figure

An RF-Powered DLL-Based 2.4-GHz Transmitter for Autonomous Wireless Sensor Nodes

This paper presents the system and circuit design of a compact radio frequency (RF)-powered 2.4-GHz CMOS transmitter (TX) to be used for autonomous wireless sensor nodes (WSNs). The proposed TX utilizes the received dedicated RF signal for both energy harvesting as well as frequency synthesis. A TX RF carrier is derived from the received RF signal by means of a delay locked loop and XOR-based frequency multiplier. The 50-Ω load is subsequently driven by a tuned switching RF power amplifier (PA) with 25% duty cycle input for high global efficiency. The design is fabricated in 40-nm CMOS technology and occupies a die area of 0.16 mm2. Experimental results show a rectifier with 36.83% peak efficiency and power management circuit with 120-nA current consumption that enables a low start-up power of -18.4 dBm. The TX outputs a continuous 2.44-GHz RF signal at -2.57 dBm with 36.5% PA drain efficiency and 23.9% global efficiency from a 915-MHz RF input and supports ON-OFF keying modulation.Accepted Author ManuscriptBio-Electronic

A self-calibrating RF energy harvester generating 1V at - 26.3 dBm

This paper presents a self-calibrating RF energy harvester capable of harvesting at lower input power levels than current state-of-the-art RF harvesters. A 5 stage cross-connected bridge rectifier is brought at resonance with a high-Q loop antenna by means of a 7-bit binary weighted capacitor bank. A control loop compensates any variation in the antenna-rectifier interface and passively boosts the antenna voltage to enhance the sensitivity. The rectifier and capacitor bank have been implemented in standard 90nm CMOS technology, includes ESD protection and are integrated on the antenna. Measurements in an anechoic chamber at 868 MHz show a -26.3 dBm sensitivity for 1V output and 25 meter range for a 1.78 W RF source in an office corridor. The maximum power efficiency of the complete harvester is 31.5%

Codesign of Electrically Short Antenna-Electronics Interfaces in the Receiving Mode

The aim of this brief is to point out the importance of codesigning electrically short antenna-electronics interfaces as a way to improve the system performance. This can be achieved if both the antenna and electronic circuit designer have a common optimization target. In this brief, the codesign principles are presented for antenna systems in the receiving mode, which includes reception of wireless information and wireless power. A general interface analysis is carried out, suggesting that the choice of interface impedance plays a crucial role in the optimization procedure and depends on the preferred signal quantity of the electronic circuit. This allows to effectively improve design criteria such as noise figure, power efficiency and sensitivity without increasing the power consumption. Finally, two examples are treated to demonstrate the antenna-electronics codesign for the reception of wireless information (low-noise amplifier) and wireless power (radio-frequency energy harvesting)

Co-design of a CMOS rectifier and small loop antenna for highly sensitive RF energy harvesters

In this paper, a design method for the co-design and integration of a CMOS rectifier and small loop antenna is described. In order to improve the sensitivity, the antenna-rectifier interface is analyzed as it plays a crucial role in the co-design optimization. Subsequently, a 5-stage cross-connected differential rectifier with a 7-bit binary-weighted capacitor bank is designed and fabricated in standard 90 nm CMOS technology. The rectifier is brought at resonance with a high-Q loop antenna by means of a control loop that compensates for any variation at the antenna-rectifier interface and passively boosts the antenna voltage to enhance the sensitivity. A complementary MOS diode is proposed to improve the harvester's ability to store and hold energy over a long period of time during which there is insufficient power for rectification. The chip is ESD protected and integrated on a compact loop antenna. Measurements in an anechoic chamber at 868 MHz demonstrate a -27 dBm sensitivity for 1 V output across a capacitive load and 27 meter range for a 1.78 W RF source in an office corridor. The end-to-end power conversion efficiency equals 40% at -17 dBm

A self-calibrating RF energy harvester generating 1V at - 26.3 dBm

This paper presents a self-calibrating RF energy harvester capable of harvesting at lower input power levels than current state-of-the-art RF harvesters. A 5 stage cross-connected bridge rectifier is brought at resonance with a high-Q loop antenna by means of a 7-bit binary weighted capacitor bank. A control loop compensates any variation in the antenna-rectifier interface and passively boosts the antenna voltage to enhance the sensitivity. The rectifier and capacitor bank have been implemented in standard 90nm CMOS technology, includes ESD protection and are integrated on the antenna. Measurements in an anechoic chamber at 868 MHz show a -26.3 dBm sensitivity for 1V output and 25 meter range for a 1.78 W RF source in an office corridor. The maximum power efficiency of the complete harvester is 31.5%