2 research outputs found

    Numerical Calculation of Losses of Trapped Vortices Under Strong RF Meissner Current and DC Superheating Field in Type II Superconductors

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    Research on the vortex dynamics and enhancing of superheating field in superconductors has attracted much attention in accelerator physics community to develop next-generation high-performance accelerator cavities. However, the extreme dynamics of curvilinear elastic vortices driven by very strong currents close to the depairing limit or superheating field of a superconductor with a nanostructured surface has not been well understood. We calculated the superheating field Hsh and critical momentum kc characterizing the wavelength of the instability λm of the Meissner state to flux penetration by solving numerically the Ginzburg-Landau equations. A bulk superconductor, superconductor with the inhomogeneous surface disorder (S-S), and multilayered surface (S-I-S) have been thoroughly investigated in this work. Our result showed that S-S and S-I-S structures can enhance the superheating field well above their clean limit. In this work extensive numerical simulation of the power dissipated by an oscillating vortex segment driven by the surface ac Meissner currents was performed. Our simulations take into account the nonlinear vortex line tension, vortex mass, Bardeen-Stephen viscous vortex drag applicable at low fields, and nonlinear Larkin-Ovchinnikov (LO) viscous drag coefficient η(v) at high fields and pinning force. We showed that the LO decrease of η(v) with the vortex velocity v could radically change the field dependence of the surface resistance Ri(H) caused by trapped vortices. At low frequencies Ri(H) exhibits a conventional increase with H. However, as frequency increases, the surface resistance becomes a nonmonotonic function of H which decreases with H at higher fields irrespective of the pinning distribution. Overheating can mask the descending field dependence of Ri(H) as frequency increases. Our numerical simulations also show that the LO effect can cause a vortex bending instability at high field amplitudes and frequencies, giving rise to the formation of dynamic kinks along with the vortex when a vortex is pinned strongly to one end. Nonlinear losses of trapped vortices in thick films under high-amplitude RF fields as functions of frequency, mean free path and pinning characteristics have been calculated

    Enerji̇ hasadı uygulamaları i̇çi̇n düşük voltajlı entegre şarj pompası devreleri̇

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    Two different low voltage integrated charge pump circuit topologies are studied in this thesis for energy harvesting applications. The circuits are implemented in 0.18 μm standard CMOS technology without the use of off-chip magnetic components and non-standard processes, and are thus suitable for low profile (small and low cost) system-on-chip applications. In the first proposed design, operation at low input voltage (~240 mV) is achieved with a 5-stage subthreshold first stage oscillator, which improves the first stage efficiency by 28%. The 50 mV hysteretic on-off decision by a comparator at the second stage enables bursts of chargepumping to a standard DC voltage, and thus improves full system efficiency by 2%. The system has been validated in application to generate 1.5 V output with 4% peak efficiency and 0.24 V input voltage. The simulation-validation correlation has been presented in detail. The second proposed system has been developed with fully integrated inductors at the first stage in order to improve the efficiency obtained in the previous design. The system can successfully convert 0.2 V up to 1.5 V with 22% efficiency based on simulations. The generated output power is 31 µW which is 94% higher than that of the previous design. The inductors are modeled using 3D Planar Electromagnetic Field Solver Software incorporating the losses associated with the silicon based spiral inductors. At the ultra-low voltage range of interest, the regulators are estimated to have lower cost and improved efficiency compared to the alternatives reported in literature including the 90 nm two-stage charge pump design previously reported by our team.Bu tezde, enerji hasadı uygulamaları için iki farklı düşük voltajlı entegre şarj pompası devre topolojisi çalışılmıştır. Devreler, çip dışı manyetik bileşenler olmaksızın 0.18 um standart CMOS teknolojisi ile yapılmıştır; bu şekilde düşük profilli (küçük ve düşük maliyetli) çip üzeri sistemler için uygundur. Sunulan ilk tasarımda düşük giriş voltajlı (~240 mV) işlem, 5 safhalı eşik altı ilk kademe osilatörü ile gerçekleştirilmiştir. Bu yaklaşım ilk kademenin verimliliğini %28 artırmıştır. 50 mV değerindeki kompratör histeresis aralığı ikinci safhadaki açma-kapama kayıplarını azaltır ve böylece tüm sistem genelinde %2 verimlilik artışı sağlar. Sistemde 0.24 V giriş voltajıyla 1.5 V çıkışın %4 verimlilikle sağlandığı uygulamalar ile doğrulanmıştır. Simülasyon-doğrulama ilişkisi detaylı olarak sunulmuştur. İkinci ileri sürülen tasarım, ilk kademede tamamen entegre bazlı indüktörler ile, ilk tasarımdaki enerji verimliliğini artırmak amaçlı tasarlanmıştır. Sistem 0.2 V girişi 1.5 V’a kadar %22 verimlilikle başarılı bir şekilde çevirmiştir. Üretilen çıkış gücü 31 uW olup bir önceki tasarıma göre %94 daha fazladır. İndüktörler 3B Düzlemsel Elektromanyetik Alan Çözücü yazılımı ile modellenmiş ve silikon bazlı spiral indüktörlerden kaynaklanan kayıplar dikkate alınmıştır. Tamamlanan tasarımlar, ultra düşük voltaj çerçevesinde, alternatiflerine göre daha düşük maliyet ve daha yüksek verimliliğe sahiptir.M.S. - Master of Scienc
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