Harmonic Distortion Characterization of SOI MOSFETs

Harmonic Distortion (HD) of Partially and Fully Depleted Silicon-on-Insulator nMOSFETs is investigated through DC and Radio-Frequency (RF) characterization methods. Those techniques are compared and it demonstrates that in saturation, HD is dominated by the DC current-voltage characteristics and that the output conductance has to be taken into account. Accurate evaluation of HD at RF requires further measurements

Analytical Expressions for Distortion of SOI MOSFETs using the Volterra Series 3D

The harmonic and intermodulation distortions of SOI MOSFETs are studied with the help of the Wiener-Volterra series. Simple relationships are given and validated through Large-Signal Network Analyser measurements. The simplicity of the formulation makes it attractive to circuit designers. Furthermore, it may be used to determine the validity range of low-frequency based distortion characterization techniques. It is shown that the dominant poles of the HD for a 0.25 µm Partially Depleted SOI MOSFET lies at a few GHz, depending on the load impedance and the biasing and that its IMD3 depends on the tone separation

Design strategies for SOI FinFET Low-Noise Amplifiers: dealing with Flicker Noise

The trade-off between gate length (Lgate), flicker noise and powder consumption in Low-Noise-Amplifiers (LNA) designed with 45nm FinFETs (FFs) has been investigated, in order to draw new design guidelines for this novel technology. The simulation results highlight the existence of an optimum Lgate which reduces the impact of flicker noise at minimum power consumption

Non-linear FinFET Modeling: Lookup Table and Empirical Approaches

The non-linear microwave modeling of advanced transistors is becoming more and more essential to the design and fabrication processes. Consequently, this study is focused on the equivalent circuit based non-linear microwave modeling of FinFET. An accurate multi-bias small signal equivalent circuit is extracted and subsequently used for analytically constructing a non-linear full blown lookup table model. Furthermore, an alternative model implementation, which is based on empirical expressions, is investigated. The validity of both non-linear modeling approaches is confirmed by the good agreement between model simulations and large signal measurements

Analysis of quasi-static assumption in nonlinear finFET model

The construction and validation of a quasi-static nonlinear microwave model for FinFETs are investigated. A very good agreement between model simulations and measurements is obtained under different DC bias points, input power levels, fundamental frequencies up to 5 GHz, and device geometries. Since the intrinsic part of the FET model is based on the quasi-static approximation, the goal of this work is to analyze in detail the limitations of this assumption by examining the intrinsic admittance parameters versus the frequency

Oscillateurs micro-ondes à faible consommation en technologie CMOS/SOI : de l’étude des dispositifs aux performances

De nos jours, la maturité de la technologie CMOS Silicium-sur-Isolant (SOI) lui offre une place de choix dans le domaine des circuits intégrés hautes fréquences à faible consommation et faible tension d’alimentation, destinés notamment au marché des systèmes de communications sans fils [1]. Nous avons réalisé des oscillateurs intégrés micro-ondes à faible consommation (< 2 mW). Une bonne évaluation du comportement de ces circuits requiert la connaissance du comportement grand signal des transistors SOI. A cette fin, différentes techniques de caractérisation non-linéaire ont été comparées et un modèle grand signal [2] utilisé pour rétro-simuler les circuits. Les mesures des oscillateurs ont mis en évidence l’impact de la technologie et du choix des dispositifs sur les performances

Harmonic distorsion characterization techniques for SOI MOSFETs

The performances of microwave transceivers depend on the knowledge of their non-linear behavior. As Silicon-on-Insulator (SOI) is one of the most promising low cost technology for integrated low-voltage, low-power circuits operating at microwave frequencies [1], we focus on the distorsion characterization of SOI nMOSFET. Several techniques to measure and characterize the distorsion of MOSFETs are already available. Some are based on the measured output DC curves, by applying Fourier analysis via the calculation of high-order derivatives of the characteristic [2] and more recently an integral method [3] was proposed. They lead to self results, but integral method has the advantage not to need evaluation of derivatives which are very sensitive to the measurements noise. While those are cheap and rapid techniques, they neglect the non-linearities associated with memory and high-frequency effects. Other techniques based on RF measurements, require more specific equipment as a sampling oscilloscope or a Large-Signal Network Analyser (LSNA) [4]. This last technique offer full characterization, at the price of an expensive and non-widespread experimental set-up

Design of UWB LNA in 45nm CMOS Technology: Planar Bulk vs. FinFET

This paper describes the design of a single-stage differential Low Noise Amplifier (LNA) for Ultra Wide Band(UWB) applications, implemented in state of the art Planar and FinFET 45nm CMOS technologies. A gm-boosted topology has been chosen and the LNA has been designed to work over the whole UWB band (3.1 \u2013 10.6GHz), while driving a capacitive load. The simulations highlight that, at the present stage of the technology development, the Planar version of the LNA outperforms the FinFET one thanks to the superior cutoff frequency fT of Planar devices in the inversion region, achieving comparable Noise Figure and voltage gain, but consuming less power