Probabilistic design for emerging memory and nanometer-scale logic

As semiconductor technology has scaled down, the impact of stochastic behavior in very large scale integrated circuits (VLSI) has become an ever-more important concern. This dissertation investigates two distinct classes of problems that require the use of probabilistic methods and models: (1) Modeling and exploiting stochastic behavior in advanced memory technologies; (2) Probabilistic modeling of faults due to on-chip voltage variation. This dissertation first investigates the unique physics-level stochasticity of spin-transfer torque magnetic RAM (STT-RAM). The write process of STT-RAM is stochastic: specifically, the write time of a bitcell varies significantly. The wors-tcase approach, which uses the longest write pulse duration, guarantees a successful write; however, it introduces significant energy overhead due to excessive margins since the average write pulse duration is far shorter than the worst-case pulse duration. This dissertation develops novel circuit techniques to exploit the stochastic properties of STT-RAM write operation for energy savings by moving away from the worst-case approach to dynamic strategies while maintaining the required low error rate. The first contribution is a variable energy write (VEW) architecture that effectively exploits the wide distribution of write time to greatly reduce energy via a mechanism that checks the instantaneous state of the bitcell and deactivates the write current once the correct value has registered. The second contribution is a multiple attempt write (MAW) strategy that utilizes the asymptotic temporal stochastic independence of repeated switching events to achieve a dramatic reduction in energy. The proposed architectures are evaluated using a compact STT-RAM cell model. Analysis indicates that VEW succeeded in reducing the write energy by 94.7% with approximately 1% relative area overhead under an efficient design methodology compared with the conventional designs relying on the worst case approach. MAW reduced the overall write energy by 94.6% with approximately 0.05% relative area overhead. This dissertation then addresses the problem of probabilistic modeling of faults due to on-chip voltage variations. The power supply voltage variation can increase gate delay, resulting in timing faults on near-critical paths. These low-level faults ultimately propagate to architecture and application levels, often leading to critical system failures. Developing an accurate fault model and injection tool that generates and propagates faults from circuit- to gate-level is important for accurately predicting the resulting system failures. This is challenging since the model needs to accurately capture the physical characteristics at the circuit level that define the likelihood of a fault and use that information to guide the injection with the proper probability. At the same time, the analysis and fault injections need to be computationally manageable to allow analysis of realistic systems under realistic workloads. The conventional fault models rely on either Monte Carlo sampling or time-consuming runtime simulation using the worst-case voltage drop. To overcome simulation overheads of runtime circuit-level simulation, a novel two-phase approach is proposed. The main idea is that circuit characterization can be done before simulation. The result of pre-characterization is used at runtime via a form of look-up to enable gate-level efficiency. The two-phase methodology is time-efficient but may require high memory unless the look-up tables are carefully optimized. This dissertation also develops the fault probability estimation based on workload-specific voltage distribution, rather than a fixed worst-case voltage. The proposed methodology is implemented on an OpenSPARC design targeting on a 32nm technology node. Analysis indicates the proposed fault modeling and injection flow reduces runtime overhead by 24X compared to the previously best-known gate-level fault simulator while having circuit level accuracy.Electrical and Computer Engineerin

How envisionment of the future influences professional identity development : a longitudinal study of students’ graduate work in a social science field

This dissertation study is a longitudinal qualitative investigation of how graduate students in a social science field construct their professional identity. Among the different identities that individuals construct and have imposed upon them, their professional identity may be more distinct as compared to other identities such as gender roles, position of caretaker, and ethnicity that may develop over a longer period of time and be more diffuse. One’s professional identity is likely to become a central identity because it provides agency, power, and a socially respected position in a particular disciplinary field and in society at large. This investigation of graduate students’ disciplinary development was designed to contribute to a better understanding of the process of professional identity development. Doctoral students in a social science field were chosen as participants because they were likely to undergo intensive identity construction processes in a short time period of time. In this staggered longitudinal study, the total number of participants was 34. Participants were tracked across milestones over at least two semesters of their program. Data collection included multiple interviews, member checking, and observation of students’ activities in content classes, research meetings, social gatherings, and professional conference participation according to distinct stages that occur over time. Analyzed using grounded theory methodology, data are presented in three themes representing significant influences on professional identity development. For the first theme, graduate students’ professional identity seemed to progress through phases marked by milestones. In Theme 2, graduate students’ professional identity seemed to develop through interactions with other individuals in several learning communities. In Theme 3, graduate students seemed to forge their professional identity through their program experiences, defining their professional self as the acquisition of self-knowledge and self-regulation skills (being professional), disciplinary knowledge and skills (being a professional), and envisionment of a professional future self participating in a community of practice. Development of professional disciplinary skills including disciplinary discourse practices appeared as a core contributor for students’ professional identity development. Generalizable professional skills seemed more subtle and foundational for the other two factors (professional skills acquisition and professional affiliation). Individuals who developed both professional skills and professional affiliation seemed to have a strong professional identity. In addition, data indicated that as graduate students underwent the professional identity process, they seemed more motivated to take up their academic responsibilities and participate in their professional field. In sum, the contribution of this study is that different influences on graduate students’ professional identity development were shown, and a clearer view of the overall professional identity development process was obtained, including what factors are influencing graduate students’ professional identity development as well as their possible future self in their disciplinary community of practice.Educational Psycholog

Low-swing signaling for energy efficient on-chip networks

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.Cataloged from PDF version of thesis.Includes bibliographical references (p. 65-69).On-chip networks have emerged as a scalable and high-bandwidth communication fabric in many-core processor chips. However, the energy consumption of these networks is becoming comparable to that of computation cores, making further scaling of core counts difficult. This thesis makes several contributions to low-swing signaling circuit design for the energy efficient on-chip networks in two separate projects: on-chip networks optimized for one-to-many multicasts and broadcasts, and link designs that allow on-chip networks to approach an ideal interconnection fabric. A low-swing crossbar switch, which is based on tri-state Reduced-Swing Drivers (RSDs), is presented for the first project. Measurement results of its test chip fabricated in 45nm SOI CMOS show that the tri-state RSD-based crossbar enables 55% power savings as compared to an equivalent full-swing crossbar and link. Also, the measurement results show that the proposed crossbar allows the broadcast-optimized on-chip networks using a single pipeline stage for physical data transmission to operate at 21% higher data rate, when compared with the full-swing networks. For the second project, two clockless low-swing repeaters, a Self-Resetting Logic Repeater (SRLR) and a Voltage-Locked Repeater (VLR), have been proposed and analyzed in simulation only. They both require no reference clock, differential signaling, and bias current. Such digital-intensive properties enable them to approach energy and delay performance of a point-to-point interconnect of variable lengths. Simulated in 45nm SOI CMOS, the 10mm SRLR featured with high energy efficiency consumes 338fJ/b at 5.4Gb/s/ch while the 10mm VLR raises its data rate up to 16.OGb/s/ch with 427fJ/b.by Sunghyun Park.S.M

Graviton Absorption by Non-BPS Branes

We consider the behaviour of neutral non-BPS branes probed by scalars and gravitons. We show that the naked singularity of the non-BPS branes is a {\it repulson} absorbing no incoming radiation. The naked singularity is surrounded by an infinite potential well breaking the unitarity of the scattering S-matrix. We compute the absorption cross section which is infrared divergent. In particular this confirms that gravity does not decouple for the non-BPS branes.Comment: 13 pages, Late

Compositional Inversion Symmetry Breaking in Ferroelectric Perovskites

Ternary cubic perovskite compounds of the form A_(1/3)A'_(1/3)A''_(1/3)BO_3 and AB_(1/3)B'_(1/3)B''_(1/3)O_3, in which the differentiated cations form an alternating series of monolayers, are studied using first-principles methods. Such compounds are representative of a possible new class of materials in which ferroelectricity is perturbed by compositional breaking of inversion symmetry. For isovalent substitution on either sublattice, the ferroelectric double-well potential is found to persist, but becomes sufficiently asymmetric that minority domains may no longer survive. The strength of the symmetry breaking is enormously stronger for heterovalent substitution, so that the double-well behavior is completely destroyed. Possible means of tuning between these behaviors may allow for the optimization of resulting materials properties.Comment: 4 pages, two-column style with 3 postscript figures embedded. Uses REVTEX and epsf macros. Also available at http://www.physics.rutgers.edu/~dhv/preprints/index.html#sai_is

E-QED: Electrical Bug Localization During Post-Silicon Validation Enabled by Quick Error Detection and Formal Methods

During post-silicon validation, manufactured integrated circuits are extensively tested in actual system environments to detect design bugs. Bug localization involves identification of a bug trace (a sequence of inputs that activates and detects the bug) and a hardware design block where the bug is located. Existing bug localization practices during post-silicon validation are mostly manual and ad hoc, and, hence, extremely expensive and time consuming. This is particularly true for subtle electrical bugs caused by unexpected interactions between a design and its electrical state. We present E-QED, a new approach that automatically localizes electrical bugs during post-silicon validation. Our results on the OpenSPARC T2, an open-source 500-million-transistor multicore chip design, demonstrate the effectiveness and practicality of E-QED: starting with a failed post-silicon test, in a few hours (9 hours on average) we can automatically narrow the location of the bug to (the fan-in logic cone of) a handful of candidate flip-flops (18 flip-flops on average for a design with ~ 1 Million flip-flops) and also obtain the corresponding bug trace. The area impact of E-QED is ~2.5%. In contrast, deter-mining this same information might take weeks (or even months) of mostly manual work using traditional approaches

Proper incorporation of self-adjoint extension method to Green's function formalism : one-dimensional δ′\delta^{'}-function potential case

One-dimensional $\delta^{'}$-function potential is discussed in the framework of Green's function formalism without invoking perturbation expansion. It is shown that the energy-dependent Green's function for this case is crucially dependent on the boundary conditions which are provided by self-adjoint extension method. The most general Green's function which contains four real self-adjoint extension parameters is constructed. Also the relation between the bare coupling constant and self-adjoint extension parameter is derived.Comment: LATEX, 13 page

Birthweight and risk markers for type 2 diabetes and cardiovascular disease in childhood: the Child Heart and Health Study in England (CHASE).

AIMS/HYPOTHESIS: Lower birthweight (a marker of fetal undernutrition) is associated with higher risks of type 2 diabetes and cardiovascular disease (CVD) and could explain ethnic differences in these diseases. We examined associations between birthweight and risk markers for diabetes and CVD in UK-resident white European, South Asian and black African-Caribbean children. METHODS: In a cross-sectional study of risk markers for diabetes and CVD in 9- to 10-year-old children of different ethnic origins, birthweight was obtained from health records and/or parental recall. Associations between birthweight and risk markers were estimated using multilevel linear regression to account for clustering in children from the same school. RESULTS: Key data were available for 3,744 (66%) singleton study participants. In analyses adjusted for age, sex and ethnicity, birthweight was inversely associated with serum urate and positively associated with systolic BP. After additional height adjustment, lower birthweight (per 100 g) was associated with higher serum urate (0.52%; 95% CI 0.38, 0.66), fasting serum insulin (0.41%; 95% CI 0.08, 0.74), HbA1c (0.04%; 95% CI 0.00, 0.08), plasma glucose (0.06%; 95% CI 0.02, 0.10) and serum triacylglycerol (0.30%; 95% CI 0.09, 0.51) but not with BP or blood cholesterol. Birthweight was lower among children of South Asian (231 g lower; 95% CI 183, 280) and black African-Caribbean origin (81 g lower; 95% CI 30, 132). However, adjustment for birthweight had no effect on ethnic differences in risk markers. CONCLUSIONS/INTERPRETATION: Birthweight was inversely associated with urate and with insulin and glycaemia after adjustment for current height. Lower birthweight does not appear to explain emerging ethnic difference in risk markers for diabetes

Adverse effect of diabetes and hyperglycaemia on arterial stiffness in Europeans, South Asians, and African Caribbeans in the SABRE study

OBJECTIVES: Ethnic minority groups in the UK experience marked differences in cardiovascular disease risk. We investigated differences in arterial central haemodynamics, stiffness, and load in a tri-ethnic population-based cohort. METHODS: A total of 1312 participants (70 ± 6 years) underwent echocardiography and measurement of brachial and central blood pressure to assess central arterial haemodynamics including central pulse pressure (cPP), arterial stiffness [cPP/stroke volume (SV)], systemic vascular resistance (SVR), and load (Ea). RESULTS: Brachial and central SBPs were similar in all ethnic groups. Compared with Europeans, cPP, cPP/SV, and Ea were higher in South Asians. In contrast, cPP/SV was lower in African Caribbeans despite higher mean arterial pressure, higher SVR, and higher diabetes prevalence. cPP/SV and Ea remained significantly higher in South Asians and significantly lower in African Caribbeans after multivariate adjustment. Diabetes and higher HbA1c were more strongly associated with higher cPP/SV in South Asians than in Europeans (Pinteraction = 0.045 and 0.005, respectively); higher HbA1c was also more strongly associated with increased Ea in South Asians than Europeans (Pinteraction = 0.01). There was no evidence of an interaction between glycaemia and cPP/SV in African Caribbeans. CONCLUSIONS: Compared with Europeans, South Asians have unfavorable arterial function. Diabetes and hyperglycaemia have a more deleterious effect on cPP/SV and Ea in South Asians. In contrast, African Caribbeans have more favourable arterial function than Europeans and South Asians. These differences may contribute to the differential ethnic rates of cardiovascular disease

Confined Quantum Time of Arrivals

We show that formulating the quantum time of arrival problem in a segment of the real line suggests rephrasing the quantum time of arrival problem to finding states that evolve to unitarily collapse at a given point at a definite time. For the spatially confined particle, we show that the problem admits a solution in the form of an eigenvalue problem of a compact and self-adjoint time of arrival operator derived by a quantization of the classical time of arrival, which is canonically conjugate with the Hamiltonian in closed subspace of the Hilbert space.Comment: Figures are now include