Pulse characterization of optically triggered SiC thyristors

International audienceThis paper deals with the pulse capabilities of 4H-SiC optically triggered thyristors. The device structure and the fabrication process are presented. The results of pulse characterizations are shown. Two types of current pulses were used, a short (pulse width of 10 μs) and a long (pulse width of 650 μs). Peak current densities of 17 kA.cm -2 and 4 kA.cm -2 were attained with short and long pulses respectively. The failures and degradation caused by these experiments are also shown in this paper

Avalanche Diodes with Low Temperature Dependence in 4H-SiC Suitable for Parallel Protection

International audienceAvalanche diodes have been fabricated on 4H-SiC substrate. These diodes show an abrupt avalanche voltage of about 59 V which corresponds to the calculated theoretical one using our previously determined impact ionization coefficients. This avalanche voltage increases by as small as 3.7 mV/K over the investigated temperature range (150K-420K)

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Parallel and serial association of SiC light triggered thyristors

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Parallel and serial association of SiC light triggered thyristors

International audienc

Conception d'une protection périphérique originale pour composants bipolaires en carbure de silicium (SiC)

La conception de protection périphérique efficace est un élément essentiel pour les composants haute tension. Ceci est d'autant plus vrai avec le matériau semi-conducteur carbure de silicium (SiC) bien adapté pour les fortes puissances. Les protections les plus courantes sont présentées : JTE (Junction Termination Extension), mesa et anneaux de garde. La caractérisation de thyristors protégés par mesa JTE met en valeur l'utilité de la conception d'une nouvelle protection périphérique. La conception comprend les études de protection de type JTE simple et multiple dont la principale originalité est d'être gravée. La sensibilité de ces protections par rapport à l'incertitude technologique sur la profondeur de gravure est particulièrement observée. L'effet des densités d'état d'interface entre le semi-conducteur et la passivation sur la JTE triple est également détaillé

Light triggered 4H-SiC thyristors with an etched guard ring assisted JTE

Plein texte disponible sur http://www.sciencedirect.com/science/article/pii/S0038110112000366#International audienceIn this paper, an original termination, the etched guard ring assisted junction termination extension (JTE), is demonstrated on 4H-SiC light triggered thyristors. The termination structure, designed with finite element simulations, is detailed and particular attention is paid to the sensitivity to etching depth uncertainties. The fabrication processes and the electrical characterization of the devices are described. A blocking voltage of 6.3 kV is attained, validating the principle of the termination. Switching and quasi static on-state measurements are also performed to investigate the functionality of the thyristors

Pulse Current Characterization of SiC GTO Thyristors with Etched JTE

International audienceIn this paper we highlight our latest results on high voltage SiC thyristors comprising an etched JTE. Compared to our previous design concepts, the thyristors described here are larger in size and have been investigated regarding pulsed power applications. Quasi-static on-state characteristics show that the devices withstand a repetitive current load of up to 16 A corresponding to a current density of 825 A/cm2. Their switching behavior was evaluated up to 1000 V demonstrating characteristic waveforms at turn-on and gate turn-off. Moreover, pulsed current characteristics show that the typical device under test sustained a current pulse of 20 μs with a peak value of 200 A and 10 kA/cm2, respectively

Impact of RIE Etching on the Breakdown Voltage of 4H-SiC Mesa Diode

International audienceThis paper presents a comparison of the reverse characteristics of mesa terminated PiN diodes fabricated on n- and p-type 4H-SiC substrates. For n-type the attained breakdown voltages are higher and for p-type lower than expected. This is likely to be explained by the presence of negative charges at the interface between passivation oxide and SiC. Supported by XPS data we come to the conclusion that the RIE process creates surface charges which have an impact on the breakdown voltage of the fabricated diodes