146 research outputs found

    Towards an Open Platform for Legal Information

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    Recent advances in the area of legal information systems have led to a variety of applications that promise support in processing and accessing legal documents. Unfortunately, these applications have various limitations, e.g., regarding scope or extensibility. Furthermore, we do not observe a trend towards open access in digital libraries in the legal domain as we observe in other domains, e.g., economics of computer science. To improve open access in the legal domain, we present our approach for an open source platform to transparently process and access Legal Open Data. This enables the sustainable development of legal applications by offering a single technology stack. Moreover, the approach facilitates the development and deployment of new technologies. As proof of concept, we implemented six technologies and generated metadata for more than 250,000 German laws and court decisions. Thus, we can provide users of our platform not only access to legal documents, but also the contained information.Comment: Accepted at ACM/IEEE Joint Conference on Digital Libraries (JCDL) 202

    Efficient Language Model Training through Cross-Lingual and Progressive Transfer Learning

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    Most Transformer language models are primarily pretrained on English text, limiting their use for other languages. As the model sizes grow, the performance gap between English and other languages with fewer compute and data resources increases even further. Consequently, more resource-efficient training methods are needed to bridge the gap for languages with fewer resources available. To address this problem, we introduce a cross-lingual and progressive transfer learning approach, called CLP-Transfer, that transfers models from a source language, for which pretrained models are publicly available, like English, to a new target language. As opposed to prior work, which focused on the cross-lingual transfer between two languages, we extend the transfer to the model size. Given a pretrained model in a source language, we aim for a same-sized model in a target language. Instead of training a model from scratch, we exploit a smaller model that is in the target language but requires much fewer resources. Both small and source models are then used to initialize the token embeddings of the larger model based on the overlapping vocabulary of the source and target language. All remaining weights are reused from the model in the source language. This approach outperforms the sole cross-lingual transfer and can save up to 80% of the training steps compared to the random initialization

    Modellierung und automatische Generierung von FPGA-basierten Testinstrumenten für den strukturellen Leiterplattentest

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    Neue Bauformen von Schaltkreisen wie BGAs führen zu sinkenden Möglichkeiten des optischen und mechanischen Testzugriffs und stellen Testsysteme vor Probleme bei der Testbarkeit von Verbindungen zwischen ICs auf Leiterplatten. Damit verbunden sind eine reduzierte Testabdeckung und steigende Kosten. Besonders für FPGAs fehlen geeignete Methoden, bei denen sich das Testsystem automatisch den Gegebenheiten der zu testenden Leiterplatte anpasst. Diese Dissertation beschäftigt sich mit dem Problem des FPGA-basierten Testens. Das vorgestellte Konzept nutzt ausschließlich vorhandene Ressourcen des FPGAs, um Testalgorithmen in dessen Logik zu implementieren und erhöht die Herstellungskosten der Leiterplatte nicht. Die Ressourcen des FPGAs stehen während der Testphase exklusiv für das Testen zur Verfügung. Ausgehend vom Stand der Technik nicht-invasiver elektrischer Verfahren für Leiterplattentests werden aktuelle Ansätze und Methoden miteinander verglichen. Aus deren Stärken und Schwächen wird eine detaillierte Zielstellung für diese Dissertation erarbeitet. Es wird eine Methode zur Generierung von Testinstrumenten für das FPGA-basierte Testen vorgestellt, die die Ausführung von Testalgorithmen in den FPGA verlagern und eine vergleichbare oder bessere Testabdeckung sowie Testgeschwindigkeit als etablierte Verfahren liefert, ohne dafür auf manuelle Eingriffe bei der Generierung angewiesen zu sein. Im Rahmen eines Lösungsansatzes wird neben der Testsystemarchitektur eine Modellierung für die an den Verbindungstests beteiligten Schaltkreise vorgestellt. Hierbei wird die Ausführung der Testalgorithmen im FPGA entweder in Software auf einem softcore-basierten Prozessor oder direkt in Hardware als diskrete Logik in einem sogenannten Co-Prozessor ermöglicht. Mit der Methode ist es möglich jeden Schaltkreis getrennt und unabhängig von der Art seiner späteren Implementierung und den konkreten Gegebenheiten des Prüflings zu modellieren. Die Generierung aller nötigen Bestandteile in Software und Hardware, wie auch deren Integration zu einem Testinstrument erfolgen dabei vollständig automatisch. Kern der Arbeit ist die Modellierung und Generierung für eingebettete Testinstrumente, die auf der Testsystemarchitektur basieren. Der Fokus wird dabei auf die zeitlich korrekte Ansteuerung der an den Verbindungstests beteiligten Schaltkreise gelegt, ohne dabei eine konkrete Implementierung vorzugeben. In Untersuchungen wird die Generierung von Testinstrumenten für verschiedene Schaltkreise betrachtet. Die Ergebnisse belegen die Leistungsfähigkeit der vorgestellten Methode zur automatischen Generierung von FPGA-basierten Testinstrumenten und zeigen eine signifikante Beschleunigung des FPGA-basierten Verbindungstests.New types of cases for integrated circuits like BGAs are leading to a decreased optical and mechanical test access. They are causing problems for test systems when testing connections between integrated circuits on printed circuit boards. This causes decreasing test coverage and increasing test costs. Especially for FPGAs some appropriate methods that automatically adapt the test system to the conditions of the printed circuit board are missing. This thesis is about the problems of FPGA-based testing. The presented concept solely uses available resources of the FPGA to transfer test algorithms from external test equipment into the programmable logic of the FPGA and therefore does not increase the production costs of the printed circuit board. The resources of the FPGA are exclusively used for testing during the test phase. Based on state-of-the-art non-invasive electrical methods for printed circuit boards with FPGAs current approaches are compared and analyzed. From the strengths and weaknesses of the considered methods a detailed description of the goals that should be achieved with this thesis is discussed. A method for the generation of so called test instruments for FPGA-based testing is presented. This method transfers the execution of test algorithms into the FPGA and has a similar or better test coverage as well as test speed compared to the well-established techniques without the need for any manually actions when generating such systems. Besides the chosen test system architecture the modeling of integrated circuits that are part of the connection test is presented. The test system architecture allows the execution of test algorithms either in software on a soft-core processor or directly in dedicated logic, so called co-processors. With this method it is possible to model each integrated circuit independent of each other and also independent of the implementation in software or hardware. The generation of all software and hardware parts of the test system is done fully automatically. Central element of this thesis is the modeling and generation of embedded test instruments, based on the presented test system architecture. The focus is on the timing-correct control routines of the integrated circuits that are part of the connection test. All parts of the test system should be modeled independent of each other and without knowledge about the use case. In experiments the generation of test instruments for different integrated circuits is carried out. These experiments prove the performance of the proposed methods for automatic generation of FPGA-based test instrument and show a significant speed-up for FPGA-based tests of printed circuit boards

    AspectCSE: Sentence Embeddings for Aspect-based Semantic Textual Similarity using Contrastive Learning and Structured Knowledge

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    Generic sentence embeddings provide a coarse-grained approximation of semantic textual similarity but ignore specific aspects that make texts similar. Conversely, aspect-based sentence embeddings provide similarities between texts based on certain predefined aspects. Thus, similarity predictions of texts are more targeted to specific requirements and more easily explainable. In this paper, we present AspectCSE, an approach for aspect-based contrastive learning of sentence embeddings. Results indicate that AspectCSE achieves an average improvement of 3.97% on information retrieval tasks across multiple aspects compared to the previous best results. We also propose using Wikidata knowledge graph properties to train models of multi-aspect sentence embeddings in which multiple specific aspects are simultaneously considered during similarity predictions. We demonstrate that multi-aspect embeddings outperform single-aspect embeddings on aspect-specific information retrieval tasks. Finally, we examine the aspect-based sentence embedding space and demonstrate that embeddings of semantically similar aspect labels are often close, even without explicit similarity training between different aspect labels.Comment: Accepted to the 14th International Conference on Recent Advances in Natural Language Processing (RANLP 2023

    IT infrastructure for research and teaching combining an online lab, a UAV and audio-visual communication

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    From previous experiences with student work, we figured out that an interesting real studying object highly motivates students to understand the theory by hands-on experiments. Based on our former work, this paper introduces a new concept, which combines three of our research topics to one complex infrastructure. We start with our existing online lab "REAL" and describe how it can be used in order to provide an experiment environment, which is available independent of laboratory opening times. Based on this, we explain how a new experimental platform can be integrated, which is focused on the stabilization of a gimbal-mounted UAV. In this context, different control techniques from different engineering disciplines such as control theory, fuzzy control, neuronal networks and reinforcement learning can be applied. Furthermore, we describe how the video conferencing tool "Homer-Conferencing" can be used as audio-visual platform to coordinate experiments. This approach enables the teacher to give direct feedback to the students. In general, our approach is intended to provide a flexible infrastructure, which can also be used among different experiment locations

    Mobile prototyping platforms for remote engineering applications

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    This paper describes a low-cost mobile communication platform as a universal rapid-prototyping system, which is based on the Quadrocopter concept. At the Integrated Hardware and Software Systems Group at the Ilmenau University of Technology these mobile platforms are used to motivate bachelor and master students to study Computer Engineering sciences. This could be done by increasing their interest in technical issues, using this platform as integral part of a new ad-hoc lab to demonstrate different aspects in the area of Mobile Communication as well as universal rapid prototyping nodes to investigate different mechanisms for self-organized mobile communication systems within the International Graduate School on Mobile Communications. Beside the three fields of application, the paper describes the current architecture concept of the mobile prototyping platform as well as the chosen control mechanism and the assigned sensor systems to fulfill all the required tasks
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