38 research outputs found

    Investigation of electrically active defects at the interface of high-k dielectrics and compound semiconductors

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    As silicon based devices in integrated circuits reach the fundamental limits of dimensional scaling there is growing research interest in the use of high electron mobility channel materials, such as indium gallium arsenide (InGaAs), in conjunction with high dielectric constant (high-k) gate oxides, for Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) based devices. The motivation for employing high mobility channel materials is to reduce power dissipation in integrated circuits while also providing improved performance. One of the primary challenges to date in the field of III-V semiconductors has been the observation of high levels of defect densities at the high-k/III-V interface, which prevents surface inversion of the semiconductor. The work presented in this PhD thesis details the characterization of MOS devices incorporating high-k dielectrics on III-V semiconductors. The analysis examines the effect of modifying the semiconductor bandgap in MOS structures incorporating InxGa1-xAs (x: 0, 0.15. 0.3, 0.53) layers, the optimization of device passivation procedures designed to reduce interface defect densities, and analysis of such electrically active interface defect states for the high-k/InGaAs system. Devices are characterized primarily through capacitance-voltage (CV) and conductance-voltage (GV) measurements of MOS structures both as a function of frequency and temperature. In particular, the density of electrically active interface states was reduced to the level which allowed the observation of true surface inversion behavior in the In0.53Ga0.47As MOS system. This was achieved by developing an optimized (NH4)2S passivation, minimized air exposure, and atomic layer deposition of an Al2O3 gate oxide. An extraction of activation energies allows discrimination of the mechanisms responsible for the inversion response. Finally a new approach is described to determine the minority carrier generation lifetime and the oxide capacitance in MOS structures. The method is demonstrated for an In0.53Ga0.47As system, but is generally applicable to any MOS structure exhibiting a minority carrier response in inversion

    Near-infrared electroluminescent devices based on colloidal HgTe quantum dot arrays

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    Crystalline 4.6 nm HgTe quantum dots, stabilized by 1-thioglycerol ligands, were synthesized by wet chemical methods. Room-temperature photoluminescencespectra of the dots, both in solution and as solid arrays, exhibited near-infrared emission. Light-emitting devices were fabricated by deposition of quantum dot layers onto glass∕indium tin oxide (ITO)∕3,4-polyethylene-dioxythiophene-polystyrene sulfonate (PEDOT) substrates followed by top contacting with evaporated aluminum. Room-temperature near-infraredelectroluminescence from 1mm2 ITO∕PEDOT∕HgTe∕Al devices, centered at ∼1600nm, with an external quantum efficiency of 0.02% and brightness of 150nW/mm2 at 50 mA and 2.5 V was achieved

    Inversion in the In0.53Ga0.47As metal-oxide-semiconductor system: Impact of the In0.53Ga0.47As doping concentration

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    In0.53Ga0.47As metal-oxide-semiconductor (MOS) capacitors with an Al2O3 gate oxide and a range of n and p-type In0.53Ga0.47As epitaxial concentrations were examined. Multi-frequency capacitance-voltage and conductance-voltage characterization exhibited minority carrier responses consistent with surface inversion. The measured minimum capacitance at high frequency (1 MHz) was in excellent agreement with the theoretical minimum capacitance calculated assuming an inverted surface. Minority carrier generation lifetimes, sg, extracted from experimentally measured transition frequencies, xm, using physics based a.c. simulations, demonstrated a reduction in sg with increasing epitaxial doping concentration. The frequency scaled conductance, G/x, in strong inversion allowed the estimation of accurate Cox values for these MOS devices

    An investigation of capacitance-voltage hysteresis in metal/high-k/In0.53Ga0.47As metal-oxide-semiconductor capacitors

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    In this work, we present the results of an investigation into charge trapping in metal/high-k/In0.53Ga0.47As metal-oxide-semiconductor capacitors (MOS capacitors), which is analysed using the hysteresis exhibited in the capacitance-voltage (C-V) response. The availability of both n and p doped In0.53Ga0.47As epitaxial layers allows the investigation of both hole and electron trapping in the bulk of HfO2 and Al2O3 films formed using atomic layer deposition (ALD). The HfO2/In0.53Ga0.47As and Al2O3/In0.53Ga0.47As MOS capacitors exhibit an almost reversible trapping behaviour, where the density of trapped charge is of a similar level to high-k/In0.53Ga0.47As interface state density, for both electrons and holes in the HfO2 and Al2O3 films. The experimental results demonstrate that the magnitude of the C-V hysteresis increases significantly for samples which have a native oxide layer present between the In0.53Ga0.47As surface and the high-k oxide, suggesting that the charge trapping responsible for the C-V hysteresis is taking place primarily in the interfacial oxide transition layer between the In0.53Ga0.47As and the ALD deposited oxide. Analysis of samples with a range of oxide thickness values also demonstrates that the magnitude of the C-V hysteresis window increases linearly with the increasing oxide thickness, and the corresponding trapped charge density is not a function of the oxide thickness, providing further evidence that the charge trapping is predominantly localised as a line charge and taking place primarily in the interfacial oxide transition layer located between the In0.53Ga0.47As and the high-k oxide. (C) 2013 AIP Publishing LLC

    Interface barriers at the interfaces of polar GaAs(111) faces with Al2O3

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    Internal photoemission measurements of barriers for electrons at interfaces between GaAs(111) and atomic-layer deposited Al2O3 indicate that changing the GaAs polar crystal face orientation from the Ga-terminated (111)A to the As-terminated (111)B has no effect on the barrier height and remains the same as at the non-polar GaAs(100)/Al2O3 interface. Moreover, the presence of native oxide on GaAs(111) or passivation of this surface with sulphur also have no measurable influence on the GaAs(111)/Al2O3 barrier. These results suggest that the orientation and composition-sensitive surface dipoles conventionally observed at GaAs surfaces are effectively compensated at GaAs/oxide interfaces. (C) 2012 American Institute of Physics. (http://dx.doi.org/10.1063/1.3698461

    In-situ characterization of Ga2O passivation of In0.53Ga0.47As prior to high-k dielectric atomic layer deposition

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    Ga2O interfacial passivation layers (IPLs) on In0.53Ga0.47As are investigated using in-situ monochromatic x-ray photoelectron spectroscopy. The oxide is entirely composed of Ga2O when deposited with an effusion cell temperature of 1500 degrees C and substrate temperature of 425 degrees C. The growth on In0.53Ga0.47As reveals slight chemical modification of the surface. The Ga2O behavior and ability to protect the III-V surface are observed following Al2O3 deposition by atomic layer deposition following each precursor pulse. Al2O3 growth by trimethyl-Al (TMA) and water reveals that the IPL undergoes the "clean-up" effect following TMA exposures causing As-As bonding formation resulting in a high interface state density. (C) 2011 American Institute of Physics. (doi:10.1063/1.3615666

    Band offsets and trap-related electron transitions at interfaces of (100)InAs with atomic-layer deposited Al2O3

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    Spectral analysis of optically excited currents in single-crystal (100)InAs/amorphous (a-)Al2O3/metal structures allows one to separate contributions stemming from the internal photoemission (IPE) of electrons into alumina and from the trapping-related displacement currents. IPE spectra suggest that the out-diffusion of In and, possibly, its incorporation in a-Al2O3 lead to the development of ≈0.4 eV wide conduction band (CB) tail states. The top of the InAs valence band is found at 3.45 ± 0.10 eV below the alumina CB bottom, i.e., at the same energy as at the GaAs/a-Al2O3 interface. This corresponds to the CB and the valence band offsets at the InAs/a-Al2O3 interface of 3.1 ± 0.1 eV and 2.5 ± 0.1 eV, respectively. However, atomic-layer deposition of alumina on InAs results in additional low-energy electron transitions with spectral thresholds in the range of 2.0–2.2 eV, which is close to the bandgap of AlAs. The latter suggests the interaction of As with Al, leading to an interlayer containing Al-As bonds providing a lower barrier for electron injection

    Diffusion of In0.53Ga0.47As elements through hafnium oxide during post deposition annealing

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    Diffusion of indium through HfO2 after post deposition annealing in N-2 or forming gas environments is observed in HfO2/In0.53Ga0.47As stacks by low energy ion scattering and X-ray photo electron spectroscopy and found to be consistent with changes in interface layer thickness observed by transmission electron microscopy. Prior to post processing, arsenic oxide is detected at the surface of atomic layer deposition-grown HfO2 and is desorbed upon annealing at 350 degrees C. Reduction of the interfacial layer thickness and potential densification of HfO2, resulting from indium diffusion upon annealing, is confirmed by an increase in capacitance. (C) 2014 AIP Publishing LLC

    In situ H(2)S passivation of In(0.53)Ga(0.47)As/InP metal-oxide-semiconductor capacitors with atomic-layer deposited HfO(2) gate dielectric

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    We have studied an in situ passivation of In(0.53)Ga(0.47)As, based on H(2)S exposure (50-350 degrees C) following metal organic vapor phase epitaxy growth, prior to atomic layer deposition of HfO(2) using Hf[N(CH(3))(2)](4) and H(2)O precursors. X-ray photoelectron spectroscopy revealed the suppression of As oxide formation in air exposed InGaAs surfaces for all H(2)S exposure temperatures. Transmission electron microscopy analysis demonstrates a reduction of the interface oxide between the In(0.53)Ga(0.47)As epitaxial layer and the amorphous HfO(2) resulting from the in situ H(2)S passivation. The capacitance-voltage and current-voltage behavior of Pd/HfO(2)/In(0.53)Ga(0.47)As/InP structures demonstrates that the electrical characteristics of samples exposed to 50 degrees C H(2)S at the end of the metal-organic vapor-phase epitaxy In(0.53)Ga(0.47)As growth are comparable to those obtained using an ex situ aqueous (NH(4))(2)S passivation. (c) 2008 American Institute of Physics. (DOI: 10.1063/1.2829586

    Energy barriers at interfaces between (100) InxGa1-xAs (0 <= x <= 0.53) and atomic-layer deposited Al2O3 and HfO2

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    The electron energy band alignment at interfaces of InxGa1-xAs (0 <= x <= 0.53) with atomic-layer deposited insulators Al2O3 and HfO2 is characterized using internal photoemission and photoconductivity experiments. The energy of the InxGa1-xAs valence band top is found to be only marginally influenced by the semiconductor composition. This result suggests that the known bandgap narrowing from 1.42 to 0.75 eV when the In content increases from 0 to 0.53 occurs mostly through downshift of the semiconductor conduction band bottom. It finds support from both electron and hole photoemission data. Similarly to the GaAs case, electron states originating from the interfacial oxidation of InxGa1-xAs lead to reduction in the electron barrier at the semiconductor/oxide interface. (C) 2009 American Institute of Physics. (DOI: 10.1063/1.3137187
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