13 research outputs found
Autonomic Management of Reconfigurable Embedded Systems using Discrete Control: Application to FPGA
This paper targets the autonomic management of dynamically partially reconfigurable hardware architectures based on FPGAs. Such hardware-level autonomic computing has been less often studied than at software-level. We consider control techniques to model the considered behaviours of the computing system and derive a controller for the control objective enforcement. Discrete Control modelled with Labelled Transition Systems is employed in this paper. Such models are amenable to Discrete Controller Synthesis algorithms that can automatically generate a controller enforcing the correct behaviours of a controlled system. A general modelling framework is proposed for the control of FPGA based computing systems. We consider system application described as task graphs and FPGA as a set of reconfigurable areas that can be dynamically partially reconfigured to execute tasks. We encode the computation of an autonomic manager as a DCS problem w.r.t. multiple constraints and objectives e.g., mutual exclusion of resource uses, power cost minimization. We validate our models and manager computations by using the BZR language and an experimental demonstrator implemented on a Xilinx FPGA platform.Nous traitons de la gestion autonomique des architectures matĂ©rielles dynamique- ment et partiellement reconfigurables ĂĄ base de FPGAs. Cette forme d'informatique autonomique au niveau matĂ©riel a Ă©tĂ© moins souvent Ă©tudiĂ© qu'au niveau logiciel. Nous considĂ©rons des tech- niques de contrĂŽle pour modĂ©liser les comportements du systĂšme de calcul et pour dĂ©river un contrĂŽleur pour le maintien de l'objectif de contrĂŽle. Nous utilisons des techniques de contrĂŽle discret modĂ©lisĂ© avec des systĂšmes de transition Ă©tiquetĂ©s. Ces modĂšles se prĂȘtent Ă une algorith- mique de synthĂšse de contrĂŽleurs discrets (SCD) qui peut gĂ©nĂ©rer automatiquement un contrĂŽleur qui force les comportements corrects d'un systĂšme contrĂŽlĂ©. Un cadre gĂ©nĂ©ral de modĂ©lisation est proposĂ© pour le contrĂŽle des systĂšmes informatiques Ă base de FPGA. Nous considĂ©rons que l'application est dĂ©crite par un graphes de tĂąches, et le FPGA comme un ensemble de zones reconfigurables, qui peuvent ĂȘtre dynamiquement et partiellement reconfigurĂ©es pour exĂ©cuter des tĂąches. Nous formulons le calcul d'un gestionnaire autonomique comme un problĂšme de SCD concernant des contraintes et objectifs multiples, par exemple, l'exclusion mutuelle de l'utilisation des ressources, la minimisation du coĂ»t en Ă©nergie. Nous validons nos modĂšles et les calculs du gestionnaire en utilisant le langage BZR et un dĂ©monstrateur expĂ©rimental mis en Ćuvre sur une plate-forme FPGA Xilinx
Extending UML/MARTE to Support Discrete Controller Synthesis, Application to Reconfigurable Systems-on-Chip Modeling
TAG SHEPERD: a Low Cost and Non Intrusive Man Overboard Detection System
International audienceThis paper presents a man overboard detection system based on the monitoring of a group of sailors. It introduces a set of existing solutions proposed to track and rescue a person falling into the water. Based on the state of the art, it describes our original solution which is low-cost and low footprint compared to the other ones. It was developed to be a plug-n-play system that can be generalized for every sailor to detect a man overboard
Designing formal reconfiguration control using UML/MARTE
International audienceThis paper presents the first framework to design and synthesize a formal controller managing dynamic reconfiguration, using a Model Driven Engineering methodology base on an extension of UML/MARTE. The implementation technique highlights the combination of hard configuration constraints using weights (control part) - ensured statically and fulfilled by the managed system at runtime - and soft constraints (decision part) which, given a set of correct and accessible configurations, choose one of them. An application model of an image processing application is presented, then transformed and synthesized to be executed on a Xilinx platform to show how the controller, executed on a Microblaze, manages the hardware reconfigurations
Autonomic Management of Dynamically Partially ReconïŹgurable FPGA Architectures Using Discrete Control
International audienc
Autonomic Management of Dynamically Partially ReconïŹgurable FPGA Architectures Using Discrete Control
International audienc
Designing formal reconfiguration control using UML/MARTE
International audienceThis paper presents the first framework to design and synthesize a formal controller managing dynamic reconfiguration, using a Model Driven Engineering methodology base on an extension of UML/MARTE. The implementation technique highlights the combination of hard configuration constraints using weights (control part) - ensured statically and fulfilled by the managed system at runtime - and soft constraints (decision part) which, given a set of correct and accessible configurations, choose one of them. An application model of an image processing application is presented, then transformed and synthesized to be executed on a Xilinx platform to show how the controller, executed on a Microblaze, manages the hardware reconfigurations