On the Modeling of the Donor/Acceptor Compensation Ratio in Carbon‐Doped GaN to Univocally Reproduce Breakdown Voltage and Current Collapse in Lateral GaN Power HEMTs

The intentional doping of lateral GaN power high electron mobility transistors (HEMTs) with carbon (C) impurities is a common technique to reduce buffer conductivity and increase breakdown voltage. Due to the introduction of trap levels in the GaN bandgap, it is well known that these impurities give rise to dispersion, leading to the so‐called “current collapse” as a collateral effect. Moreover, first‐principles calculations and experimental evidence point out that C introduces trap levels of both acceptor and donor types. Here, we report on the modeling of the donor/acceptor compensation ratio (CR), that is, the ratio between the density of donors and acceptors associated with C doping, to consistently and univocally reproduce experimental breakdown voltage (VBD) and current‐collapse magnitude (ΔICC). By means of calibrated numerical device simulations, we confirm that ΔICC is controlled by the effective trap concentration (i.e., the difference between the acceptor and donor densities), but we show that it is the total trap concentration (i.e., the sum of acceptor and donor densities) that determines VBD, such that a significant CR of at least 50% (depending on the technology) must be assumed to explain both phenomena quantitatively. The results presented in this work contribute to clarifying several previous reports, and are helpful to device engineers interested in modeling C‐doped lateral GaN power HEMTs

The effects of carbon on the bidirectional threshold voltage instabilities induced by negative gate bias stress in GaN MIS-HEMTs

In this paper, numerical device simulations are used to point out the possible contributions of carbon doping to the threshold voltage instabilities induced by negative gate bias stress in AlGaN/GaN metal–insulator–semiconductor high-electron mobility transistors. It is suggested that carbon can have a role in both negative and positive threshold voltage shifts, as a result of (1) the changes in the total negative charge stored in the carbon-related acceptor traps in the GaN buffer, and (2) the attraction of carbon-related free holes to the device surface and their capture into interface traps or recombination with gate-injected electrons. For a proper device optimization of carbon-doped MIS-HEMTs, it is therefore important to take these mechanisms into account, in addition to those related to defects in the gate dielectric volume and interface which are conventionally held responsible for threshold voltage instabilities

GaN-based power devices: Physics, reliability, and perspectives

Over the last decade, gallium nitride (GaN) has emerged as an excellent material for the fabrication of power devices. Among the semicon- ductors for which power devices are already available in the market, GaN has the widest energy gap, the largest critical field, and the highest saturation velocity, thus representing an excellent material for the fabrication of high-speed/high-voltage components. The presence of spon- taneous and piezoelectric polarization allows us to create a two-dimensional electron gas, with high mobility and large channel density, in the absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors, switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable a high-frequency operation, with consequent advantages in terms of miniaturization. For high power/high- voltage operation, vertical device architectures are being proposed and investigated, and three-dimensional structures—fin-shaped, trench- structured, nanowire-based—are demonstrating great potential. Contrary to Si, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This Tutorial describes the physics, technology, and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main proper- ties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight into the most relevant aspects gives the reader a comprehensive overview on the present and next-generation GaN electronics

Evaluation of VTH and RON Drifts during Switch-Mode Operation in Packaged SiC MOSFETs

In this paper, we investigate the evolution of threshold voltage (VTH) and on-resistance (RON) drifts in the silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors (MOSFETs) during the switch-mode operation. A novel measurement setup for performing the required on-the-fly characterization is presented and the experimental results, obtained on commercially available TO-247 packaged SiC devices, are reported. Measurements were performed for 1000 s, during which negative VTH shifts (i.e., VTH decrease) and negative RON drifts (i.e., RON decrease) were observed. To better understand the origin of these parameter drifts and their possible correlation, measurements were performed for different (i) gate-driving voltage (VGH) and (ii) off-state drain voltage (VPH). We found that VTH reduction leads to a current increase, thus yielding RON to decrease. This correlation was explained by the RON dependence on the overdrive voltage (VGS–VTH). We also found that gate-related effects dominate the parameter drifts at low VPH with no observable recovery, due to the repeated switching of the gate signal required for the parameter monitoring. Conversely, the drain-induced instabilities caused by high VPH are completely recoverable within 1000 s from the VPH removal. These results show that the measurement setup is able to discern the gate/drain contributions, clarifying the origin of the observed VTH and RON drifts

Variability and sensitivity to process parameters variations in InGaAs Dual-Gate Ultra-Thin Body MOSFETS: A scaling perspective

In this work, we present a combined analysis on the statistical variability of threshold voltage, on-state current, and leakage current of III-V ultra-scaled MOSFETs. In addition, we analyze the sensitivity of threshold voltage to critical geometrical and process parameters variations (i.e, gate length, channel thickness, oxide thickness and channel doping). Our analysis verifies the scaling potential of the InGaAs Technology from the variability/sensitivity standpoint for two technologicaTnodes (Lg = 15 nm, Lg = 10.4 nm), by means of Quantum Drift-Diffusion (QDD) simulations. The structure under investigation is a template Dual-Gate Ultra-Thin Body device realized following ITRS projections. The variability sources under consideration are: Random Dopant Fluctuation (RDF), Work Function Fluctuation (WFF), Body- and Gate-Line Edge Roughness (LER). The sensitivity analysis of threshold voltage is performed by considering also the effects of statistical variability to evaluate their combined effect. The results of the statistical variability analysis highlight the importance of carefully controlling Body-LER, as forecasted in the new IRDS report. Moreover, the combined effect of variability and sensitivity to channel thickness are found to be critical to the scaling process (down to Lg =10.4 nm), as it leads to significant leakage increase or performance reduction, potentially resulting in always-on devices

The Role of Carbon Doping on Breakdown, Current Collapse and Dynamic On-Resistance Recovery in AlGaN/GaN High Electron Mobility Transistors on Semi‐Insulating SiC Substrates

In this work, the critical role of carbon doping in the electrical behavior of AlGaN/GaN High Electron Mobility Transistors (HEMTs) on semi-insulating SiC substrates is assessed by investigating the off-state three terminal breakdown, current collapse and dynamic on-resistance recovery at high drain-source voltages. Extensive device simulations of typical GaN HEMT structures are carried out and compared to experimental data from published, state-of-the-art technologies to: i) explain the slope of the breakdown voltage as a function of the gate-to-drain spacing lower than GaN critical electric field as a result of the non-uniform electrical field distribution in the gate-drain access region; ii) attribute the drain current collapse to trapping in deep acceptor states in the buffer associated with carbon doping; iii) interpret the partial dynamic on-resistance recovery after off-state stress at high drain-source voltages as a consequence of hole generation and trapping

Evaluation of VTH and RON Drifts during Switch-Mode Operation in Packaged SiC MOSFETs

In this paper, we investigate the evolution of threshold voltage (VTH) and on-resistance (RON) drifts in the silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors (MOSFETs) during the switch-mode operation. A novel measurement setup for performing the required on-the-fly characterization is presented and the experimental results, obtained on commercially available TO-247 packaged SiC devices, are reported. Measurements were performed for 1000 s, during which negative VTH shifts (i.e., VTH decrease) and negative RON drifts (i.e., RON decrease) were observed. To better understand the origin of these parameter drifts and their possible correlation, measurements were performed for different (i) gate-driving voltage (VGH) and (ii) off-state drain voltage (VPH). We found that VTH reduction leads to a current increase, thus yielding RON to decrease. This correlation was explained by the RON dependence on the overdrive voltage (VGS–VTH). We also found that gate-related effects dominate the parameter drifts at low VPH with no observable recovery, due to the repeated switching of the gate signal required for the parameter monitoring. Conversely, the drain-induced instabilities caused by high VPH are completely recoverable within 1000 s from the VPH removal. These results show that the measurement setup is able to discern the gate/drain contributions, clarifying the origin of the observed VTH and RON drifts

Modeling Nanoscale III–V Channel MOSFETs with the Self-Consistent Multi-Valley/Multi-Subband Monte Carlo Approach

We describe the multi-valley/multi-subband Monte Carlo (MV\u2013MSMC) approach to model nanoscale MOSFETs featuring III\u2013V semiconductors as channel material. This approach describes carrier quantization normal to the channel direction, solving the Schr\uf6dinger equation while off-equilibrium transport is captured by the multi-valley/multi-subband Boltzmann transport equation. In this paper, we outline a methodology to include quantum effects along the transport direction (namely, source-to-drain tunneling) and provide model verification by comparison with Non-Equilibrium Green\u2019s Function results for nanoscale MOSFETs with InAs and InGaAs channels. It is then shown how to use the MV\u2013MSMC to calibrate a Technology Computer Aided Design (TCAD) simulation deck based on the drift\u2013diffusion model that allows much faster simulations and opens the doors to variability studies in III\u2013V channel MOSFETs

Halide perovskite high-k field-effect transistors with dynamically reconfigurable ambipolarity

International audienceDespite the remarkable optoelectronic properties of halide perovskites, achieving reproducible field effect transistor (FET) action in polycrystalline films at room temperature has been challenging and represents a fundamental bottleneck for understanding electronic charge transport in these materials. In this work, we report halide perovskite-based FET operation at room temperature with negligible hysteresis. Extensive measurements and device modeling reveal that incorporating high-k dielectrics enables modulation of the channel conductance. Furthermore, continuous bias cycling or resting allows dynamical reconfiguration of the FETs between p-type behavior and ambipolar FET with balanced electron and hole transport and an ON/OFF ratio up to 104 and negligible degradation in transport characteristics over 100 cycles. These results elucidate the path for achieving gate modulation in perovskite thin-films and provide a platform to understand the interplay between the perovskite structure, and external stimuli such as photons, fields and functional substrates, which will lead to novel and emergent properties