Nonexistence results for the Korteweg-deVries and Kadomtsev-Petviashvili equations

We study characteristic Cauchy problems for the Korteweg-deVries (KdV) equation $u_t=uu_x+u_{xxx}$, and the Kadomtsev-Petviashvili (KP) equation $u_{yy}=\bigl(u_{xxx}+uu_x+u_t\bigr)_x$ with holomorphic initial data possessing nonnegative Taylor coefficients around the origin. For the KdV equation with initial value $u(0,x)=u_0(x)$, we show that there is no solution holomorphic in any neighbourhood of $(t,x)=(0,0)$ in ${\mathbb C}^2$ unless $u_0(x)=a_0+a_1x$. This also furnishes a nonexistence result for a class of $y$-independent solutions of the KP equation. We extend this to $y$-dependent cases by considering initial values given at $y=0$, $u(t,x,0)=u_0(x,t)$, $u_y(t,x,0)=u_1(x,t)$, where the Taylor coefficients of $u_0$ and $u_1$ around $t=0$, $x=0$ are assumed nonnegative. We prove that there is no holomorphic solution around the origin in ${\mathbb C}^3$ unless $u_0$ and $u_1$ are polynomials of degree 2 or lower.Comment: 17 pages in LaTeX2e, to appear in Stud. Appl. Mat

A Determinizing Compiler

The advent of multicores mandates parallel programming. While parallelism presents a panoply of problems, few are as pernicious and prevalent as nondeterminism, in which the output of a program is affected by more than just its inputs, e.g., uncontrollable scheduling choices made by the operating system. A few parallel languages do guarantee determinism, but do so through draconian restrictions. It is time for a new era of bug-free parallel programming that will enable programmers to shift easily from sequential to parallel worlds.We propose a determinizing compiler: starting from a non-deterministic program, our compiler inserts just enough additional synchronization to guarantee deterministic behavior, even in the presence of nondeterministic scheduling choices. A brute-force solution would simply generate sequential code, but our compiler will strive to preserve parallelism to impose a minimal loss of performance

Static Deadlock Detection for the SHIM Concurrent Language

Concurrent programming languages are becoming mandatory with the advent of multi-core processors. Two major concerns in any concurrent program are data races and deadlocks. Each are potentially subtle bugs that can be caused by non-deterministic scheduling choices in most concurrent formalisms. As an alternative, the SHIM concurrent language guarantees the absence of data races by eschewing shared memory, but a SHIM program may still deadlock if a program violates a communication protocol. We present a model-checking-based static deadlock detection technique for the SHIM language. Although SHIM is asynchronous, its semantics allow us to model it synchronously without losing precision, greatly reducing the state space that must be explored. This plus the obvious division between control and data in SHIM programs makes it easy to construct concise abstractions. Experimentally, we find our procedure runs in only a few seconds for modest-sized programs, making it practical to use as part of a compilation chain

Buffer Sharing in Rendezvous Programs

Most compilers focus on optimizing performance, often at the expense of memory, but efficient memory use can be just as important in constrained environments such as embedded systems. This paper presents a memory reduction technique for rendezvous communication, which is applied to the deterministic concurrent programming language SHIM. It focuses on reducing memory consumption by sharing communication buffers among tasks. It determines pairs of buffers that can never be in use simultaneously and use a shared region of memory for each pair. The technique produces a static abstraction of a SHIM program's dynamic behavior, which is then analyzed to find buffers that are never occupied simultaneously. Experiments show the technique runs quickly on modest-sized programs and can sometimes reduce memory requirements by half

Ensuring Deterministic Concurrency through Compilation

Multicore shared-memory architectures are becoming prevalent but bring many programming challenges. Among the biggest is non-determinism: the output of the program does not depend merely on the input, but also on scheduling choices taken by the operating system. In this paper, we discuss and propose additional tools that provide determinism guarantees-compilers that generate deterministic code, libraries that provide deterministic constructs, and analyzers that check for determinism. Additionally, we discuss techniques to check for problems like deadlock that can result from the use of these deterministic constructs

Determinism Should Ensure Deadlock-Freedom

The advent of multicore processors has made concurrent programming models mandatory. However, most concurrent programming models come with two major pitfalls: non-determinism and deadlocks. By determinism, we mean the output behavior of the program is independent of the scheduling choices (e.g., the operating system) and depends only on the input behavior. A few concurrent models provide deterministic behavior by providing constructs that impose additional synchronization, but improper or out-of-order use of these constructs leads to problems like deadlocks. In this paper, we argue for both determinism and deadlock-freedom. We propose a design of a deterministic, deadlock-free model. Any program that uses this model is guaranteed to produce the same output for a given input. Additionally, the program will never deadlock: the program will either terminate or run forever

Buffer Sharing in CSP-like Programs

Most compilers focus on optimizing performance, often at the expense of memory, but efficient memory use can be just as important in constrained environments such as embedded systems. In this paper, we present a memory reduction technique for the deterministic concurrent programming language SHIM. We focus on reducing memory consumption by sharing buffers among the tasks, which use them to communicate using CSP-style rendezvous. We determine pairs of buffers that can never be in use simultaneously and use a shared region of memory for each pair. Our technique produces a static abstraction of a SHIM program’s dynamic behavior, which we then analyze to find buffers that can share memory. Experimentally, we find our technique runs quickly on modest-sized programs and often reduces memory requirements by half

A JPEG Decoder in SHIM

Image compression plays an important role in multimedia systems, digital systems, handheld systems and various other devices. Efficient image processing techniques are needed to make images suitable for use in embedded systems. This paper describes an implementation of a JPEG decoder in the SHIM programming language. SHIM is a software/hardware integration language whose aim is to provide communication between hardware and software while providing deterministic concurrency. The paper shows that a JPEG decoder is a good application and reasonable test case for the SHIM language and illustrates the ease with which conventional sequential decoders can be modified to achieve concurrency

Simulation Analysis of MPPT Algorithm for a PV System Using a ZSI and Contrast with DC-DC Boosted VSI

Energy demand is increasing from past few decades and Renewable energy resources are used for supplying that increasing power demand. So in order to increase the efficiency and power output of PV system MPPT Technique plays a major role. As PV arrays undergoes nonlinear and voltage-current characteristics thus MPPT Algorithm is necessary. Therefore it is necessary to operate the solar panel at its maximum power point tracking to ensure increase in the extraction of power from solar panel. Hence MPPT algorithm is necessary in PV array to maximize its output power. In this Paper a new Converter model named as Impedance(Z) Source Inverter with advanced MPC technique is used for MPPT for Grid connected PV harvesting system. A Single Stage Conversion has been carried out in ZSI for MPPT whereas in Conventional converters like VSI and CSI carries out. The Output of ZSI for PV system is compared with voltage Boosted converter and thus observed that dynamic stability of the system increases, THD reduces, power factor improves and efficiency increases by using ZSI for PV system. Simulation and experimental studies verify the performance of a new proposed control strategy