Radiation tolerant and controlable power supply design and implementation for the VFE of SPD at LHCB detector

Projecte Final de Carrera d'Enginyeria Electrònica, Universitat de Barcelona, Facultat de Física. Director: Atilà Herms i Berenguer. Any: 2005[cat] En el present projecte, emmarcat en el disseny electrònic de circuits de control, es desenvolupa la font d’alimentació per als circuits de lectura de dades (VFE) del subdetector SPD en el detector LHCb que s’està construint al CERN. Per tant és una de les parts principals que formen aquest subdetector i s’ha d’assegurar la seva robustesa amb el màxim de funcionalitat implementada possible. Cal tenir en compte que tota la electrònica d’aquest subdetector treballarà sota un entorn en radiació i, per tant, s’han de prendre totes les mesures necessàries per assegurar-ne un correcte funcionament en aquest entorn. El sistema de regulació de tensió es basa en reguladors lineals dissenyats de forma específica per a una empresa privada per tal d’assegurar la resistència a la radiació esmentada anteriorment. Pel que respecta el control d’aquesta font s’utilitzen FPGA’s també tolerants a la radiació. La flexibilitat d’aquests dispositius ens permeten implementar tots els elements lògics de control, comunicació i lectura de dades necessaris per a l’aplicació. El disseny del sistema es divideix bàsicament en les següents tasques; definició dels requeriments (que ens vindràn limitats en la seva majoria per les característiques de consum del VFE i de control en el subdetector), selecció dels components a utilitzar en la implementació electrònica, disseny dels esquemes necessaris, disseny del circuit impres, prototipatge del circuit i posta en marxa, codificació en un llenguatge de descripció de hardware (VHDL) de les funcions de control i finalment la comprovació del correcte funcionament del hardware. Degut a les necessitats de control d’aquesta aplicació també s’hauran de realitzar dissenys de circuits auxiliars i de software per tal de comprovar el correcte funcionament del prototip. Aquest projecte representa un bon exemple del desenvolupament complet d’un disseny de hardware mixte digital/analògic basat en una FPGA en l’àmbit de la recerca.[eng] In the present project we present the developement of the electronic system of the low voltage power supply of the VFE board of the SPD subdetector in the LHCb detector that is being built at CERN. This is a fundamental part to assure the correct behaviour of the subdetector system. In this design we must take into account that all the electronics of the subdetector will be exposed to relevant levels of radiation and use the components most suituable to work in this environment. The voltage regulator system is based in linear regulators designed by a comercial manufacturer specially for this purpose of working under radiation conditions. In the control part we will use FPGA’s wick are also radiation tolerant. The flexibility of this devices will perit the implementation of all the logic elements of control, comunications and data readout necessary for this aplication. The design of the whole system will follow this steps; definititon of the specifications (basically determined by the power consumption of the VFE and the comunications system used at the subdetector), selection of the components wich will be used, schematics design, printed circuit board design, prototiping, coding of the FPGA funcionality in VHDL and finally checking of the complete design behaviour. In addition and because of the control nature of this design there would be necessary to design some auxiliar hardware and to code some software in order to check the correct behaviour of the prototype. This project represents a good example of a complete hardware developement of a mixed signal system (analog and digital) in the research scope

Implementació tècnica d'una eina 'clica i escolta' al Moodle: prova pilot a la Universitat de Barcelona

L'article exposa la implementació tècnica del ReadSpeaker, una eina que converteix el text a veu, al Campus Virtual de la Universitat de Barcelona. Aquesta implementació s'ha dut a terme exclusivament des d'una plantilla del Moodle, mitjançant l'alteració del DOM1 amb codi JavaScript. Objectius: implementar una eina de text a veu al Campus Virtual de la Universitat de Barcelona, basat en el sistema de gestió de continguts Moodle, per proporcionar una major accessibilitat a aquest entorn. L'eina converteix a veu tant els continguts web com els continguts dels arxius PDF. Metodologia: desenvolupament informàtic basat en l'anàlisi del sistema utilitzat per la Universitat de Barcelona en el Campus Virtual i adaptació posterior de l'eina proporcionada per aconseguir un funcionament correcte. Resultats: s'ha pogut incorporar l'eina dins el Campus d'una forma estable i funcional. L'accés als arxius PDF només és possible si es troben en obert

Mining Patterns for Web-based Emergency Management Systems

6 pages, 1 figure.-- Contributed to: 4th International Conference on Information Systems for Crisis Response and Management (ISCRAM2007, Delft, the Netherlands, May 13-16, 2007).Design patterns describe problems that occur recurrently, and specify the core of the solution in such a way that we can (re)use it in different contexts and applications. Although, web-based Emergency Management Systems domain is still in its nascent stages, there are design principles, real systems and design patterns from other related areas that can be a valuable source of knowledge to mine design patterns. From these sources we have created a patterns catalogue to assist novice designers on discovering what issues should be addressed to develop useful and successful systems. In this paper, we present the mining process and some patterns as example.This work is supported by the ARCE++ project (TSI2004-03394) funded by the Spanish Ministry of Science and Education (MEC) and a cooperation agreement between "Universidad Carlos III de Madrid" and "Dirección General de Protección Civil y Emergencias" (Ministry of the Interior).Publicad

PACIFIC: the readout ASIC for the SciFi Tracker of the upgraded LHCb detector

The LHCb detector will be upgraded during the Long Shutdown 2 (LS2) of the LHC in order to cope with higher instantaneous luminosities and will switch to a 40 MHz readout rate using a trigger-less software based system. All front-end electronics will be replaced and several sub-detectors must be redesigned to cope with the higher detector occupancy and radiation damage. The current tracking detectors downstream of the LHCb dipole magnet will be replaced by the Scintillating Fibre (SciFi) Tracker. The SciFi Tracker will use scintillating fibres read out by Silicon Photomultipliers (SiPMs). State-of-the-art multi-channel SiPM arrays are being developed and a custom ASIC, called the low-Power ASIC for the sCIntillating FIbres traCker (PACIFIC), will be used to digitise the signals from the SiPMs. This article presents an overview of the R&D for the PACIFIC. It is a 64-channel ASIC implemented in 130 nm CMOS technology, aiming at a radiation tolerant design with a power consumption below 10 mW per channel. It interfaces directly with the SiPM anode through a current mode input, and provides a configurable non-linear 2-bit per channel digital output. The SiPM signal is acquired by a current conveyor and processed with a fast shaper and a gated integrator. The digitization is performed using a three threshold non-linear flash ADC operating at 40 MHz. Simulation and test results show the PACIFIC chip prototypes functioning well

Evidence for the decay B0→J/ψω and measurement of the relative branching fractions of B0s meson decays to J/ψη and J/ψη′

First evidence of the B0 → J/ψω decay is found and the B0 s → J/ψη and B0 s → J/ψη decays are studied using a dataset corresponding to an integrated luminosity of 1.0 fb−1 collected by the LHCb experiment in proton–proton collisions at a centre-of-mass energy of √s = 7 TeV.

Oración inaugural que en la solemne apertura de estudios de la Universidad Literaría de Granada, verificada el dia 1 de octubre de 1846

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Algunas observaciones acerca del Proyecto de ley de Enseñanza

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Searches for Λ0b and Ξ0b decays to K0Spπ− and K0SpK− final states with first observation of the Λ0b→K0Spπ− decay

A search for previously unobserved decays of beauty baryons to the final states K0 S pπ− and K0 S pK− is reported. The analysis is based on a data sample corresponding to an integrated luminosity of 1.0 fb−1 of pp collisions. The Λ 0 b → K0pπ− decay is observed with a significance of 8.6 σ, with branching fraction B(Λ 0 b → K0 pπ−) = (1.26 ± 0.19 ± 0.09 ± 0.34 ± 0.05) × 10−5 , where the uncertainties are statistical, systematic, from the ratio of fragmentation fractions fΛ0 b /fd, and from the branching fraction of the B0→ K0π +π − normalisation channel, respectively. A first measurement is made of the CP asymmetry, giving ACP (Λ 0 b → K0 pπ−) = 0.22 ± 0.13 (stat) ± 0.03 (syst). No significant signals are seen for Λ 0 b → K0 S pK− decays, Ξ0 b decays to both the K0 S pπ− and K0 S pK− final states, and the Λ 0 b → D− s (→ K0 SK−)p decay, and upper limits on their branching fractions are reported

Readout electronics for low dark count pixel detectors based on geiger mode avalanche photodiodes fabricated in conventional CMOS technologies for future linear colliders

The high sensitivity and excellent timing accuracy of Geiger mode avalanche photodiodes makes them ideal sensors as pixel detectors for particle tracking in high energy physics experiments to be performed in future linear colliders. Nevertheless, it is well known that these sensors suffer from dark counts and afterpulsing noise, which induce false hits (indistinguishable from event detection) as well as an increase of the necessary area of the readout system. In this work, we present a comparison between APDs fabricated in a high voltage 0.35 µm and a high integration 0.13 µm commercially available CMOS technologies that has been performed to determine which of them best fits the particle collider requirements. In addition, a readout circuit that allows low noise operation is introduced. Experimental characterization of the proposed pixel is also presented in this work