Process-Induced Power-Performance Variability in Sub-5nm III-V Tunnel FETs

We examine the power-performance variability of a projected sub-5-nm GaAsSb/InGaAs vertical tunnel FET considering various process control tolerances in the state-of-the-art device integration and propose countermeasures in device design. Nominal and three-sigma-corner device characteristics generated in quantum-mechanical/TCAD simulations are used to calibrate a semiempirical compact model, based on which the nominal and variability-inclusive energy-delay landscapes are extracted from ring-oscillator circuit simulations at sub-500-mV supply voltages. Variations in four parameters are identified as of major impact on the worst-case speed loss and iso-speed energy penalty: dopant pocket thickness, gate work function, hetero-band offset, and body thickness (in descending order). Variability-resilient device options are explored against pocket thickness variation, including: 1) pocket desensitization with increased thickness and reduced doping concentration and 2) broken-gap tunnel FET with a negative effective band gap. Reengineered devices achieve <18x speed loss and <3x energy penalty for (0.1-1) ns gate delay with respect to the nominal corner.status: Published onlin

Calibration of the high-doping induced ballistic band-tails tunneling current in In0.53Ga0.47As Esaki diodes

© 2017 IEEE. I. Introduction The growing demand for power efficient devices has accelerated the research into the use of the tunnel field-effect transistor (TFET) in future ultra-low power applications because of its promising potential for sub-60 mV/dec subthreshold swing achieved through quantum mechanical band-To-band tunneling (BTBT) [1]-[3]. Unfortunately, a significant gap between theoretical predictions and experiments remains to be bridged [2]. Considerable efforts are being made to develop models for some of the main causes of suboptimal TFET performance such as trap-Assisted tunneling (TAT) [4], [5], phonon-Assisted tunneling (PAT) [6], and Auger generated leakage currents [7]. However, aside from qualitative analyses [8] and purely predictive work on the device impact of tunneling transitions involving high-doping induced band-Tails states in InSb nanowire TFETs [9] and 2D-TFETs [10], no attempts have been made to calibrate these contributions. This work aims to fill this gap by developing and calibrating an approximate ballistic semi-classical (SC) model for high-doping induced band-Tails using the experimental I-V data of In0.53Ga0.47As p-i-n Esaki diodes [11]. The hypothesis is posited that the mismatch between measurement and simulation in the negative differential resistance regime (see Fig. 1), which cannot be explained by SC TAT models, is caused by ballistic band-Tails tunneling. The calibration thus gives an upper limit to the band-Tails current. Lastly, the impact of band-Tails on the performance of a p-n-i-n TFET is investigated.status: publishe

Analytical model of thin-body InGaAs-on-InP MOSFET low-field electron mobility for integration in TCAD tools

A simple analytical model of thin-body In0.53Ga0.47As-on-InP MOSFET low-field electron mobility suitable for integration in Technology-CAD (TCAD) tools is presented. Phonon, Coulomb and surface roughness scattering are accounted for. In order to characterize the phonon scattering contribution, an expression for the device effective thickness is derived from 1-D Schroedinger-Poisson simulations. The model is validated through comparison with experimental CG-Vgs and Id-Vgs curves collected on transistors with body thicknesses down to 5 nm

A TCAD Low-Field Electron Mobility Model for Thin-Body InGaAs on InP MOSFETs Calibrated on Experimental Characteristics

A simple analytical low-field electron mobility model to be employed for technology computer-aided design of thin-body MOSFETs based on III-V compound semiconductors is presented. The scattering sources accounted for in the model are Coulomb centers, lattice vibrations (i.e., phonons), and surface roughness. The dependence of the thin-body effective thickness on the transverse electric field is calculated through 1-D Schrödinger-Poisson numerical simulations and is introduced in the model by means of an appropriate analytical function. Then, the free-electron density distribution is determined by considering both quantization effects and oxide-semiconductor interface traps. The model is calibrated on the experimental data collected on In0.53Ga0.47AS-on-InP thin-body MOSFETs featuring body thicknesses as low as 5 nm. In particular, the model accurately reproduces CG-VGS characteristics, effective mobility against inversion layer charge plots, and IDS-VGS curves at low VDS

A TCAD Low-Field Electron Mobility Model for Thin-Body InGaAs on InP MOSFETs Calibrated on Experimental Characteristics

A simple analytical low-field electron mobility model to be employed for technology computer-aided design of thin-body MOSFETs based on III-V compound semiconductors is presented. The scattering sources accounted for in the model are Coulomb centers, lattice vibrations (i.e., phonons), and surface roughness. The dependence of the thin-body effective thickness on the transverse electric field is calculated through 1-D Schr\uf6dinger-Poisson numerical simulations and is introduced in the model by means of an appropriate analytical function. Then, the free-electron density distribution is determined by considering both quantization effects and oxide-semiconductor interface traps. The model is calibrated on the experimental data collected on In0.53Ga0.47AS-on-InP thin-body MOSFETs featuring body thicknesses as low as 5 nm. In particular, the model accurately reproduces CG-VGS characteristics, effective mobility against inversion layer charge plots, and IDS-VGS curves at low VDS

Calibration of the effective tunneling bandgap in GaAsSb/InGaAs for improved TFET performance prediction

© 2016 IEEE. The effective bandgap for heterojunction band-to-band tunneling (Eg,eff) is a crucial design parameter for a heterojunction tunneling FET (TFET). However, there is significant uncertainty on Eg,eff, especially for In0.53Ga0.47As/ GaAs0.5Sb0.5. This makes the prediction of TFET performance difficult. We calibrate Eg,eff by fabricating heterojunction p+/i/n+ diodes, comparing the simulated and the measured current-voltage and capacitance-voltage curves, while taking Eg,eff as a fitting parameter. Our calibration significantly reduces the uncertainty on Eg,eff compared with the range found in the literature. The comparison with the previous work on highly doped heterojunction diodes suggests that dopant-dependent bandgap narrowing reduces Eg,eff and therefore significantly impacts the performance of highly doped TFET.status: publishe

Self-consistent procedure including envelope function normalization for full-zone Schrodinger-Poisson problems with transmitting boundary conditions

© 2018 Author(s). In the quantum mechanical simulation of exploratory semiconductor devices, continuum methods based on a k ⋅p/envelope function model have the potential to significantly reduce the computational burden compared to prevalent atomistic methods. However, full-zone k ⋅p/envelope function simulation approaches are scarce and existing implementations are not self-consistent with the calculation of the electrostatic potential due to the lack of a stable procedure and a proper normalization of the multi-band envelope functions. Here, we therefore present a self-consistent procedure based on a full-zone spectral k ⋅p/envelope function band structure model. First, we develop a proper normalization for the multi-band envelope functions in the presence of transmitting boundary conditions. This enables the calculation of the free carrier densities. Next, we construct a procedure to obtain self-consistency of the carrier densities with the electrostatic potential. This procedure is stabilized with an adaptive scheme that relies on the solution of Poisson’s equation in the Gummel form, combined with successive underrelaxation. Finally, we apply our procedure to homostructure In 0.53Ga 0.47As tunnel field-effect transistors (TFETs) and staggered heterostructure GaAs 0.5Sb 0.5/In 0.53Ga 0.47As TFETs and show the importance of self-consistency on the device predictions for scaled dimensions.status: publishe