26 research outputs found
The p-ring Trench Schottky IGBT: A solution towards latch-up immunity and an enhanced safe-operating area
A novel Trench IGBT design, namely the p-ring Trench Schottky IGBT, with improved latch-up immunity and an enhanced safe-operating area is proposed. This design improves the performance of the FS+ IGBT by facilitating the collection of holes through a p-doped (p-ring) buried region connected through a Schottky contact to the source/cathode contact. This unique structure approach allows the improvement in the device reliability and it is shown under numerical studies to be highly effective in expanding the safe operating area (SOA), suppress dynamic avalanche, improve the latch up robustness and have the potential to improve the device switching operation
Tunnel FET with non-uniform gate capacitance for improved device and circuit level performance
Comparison of semiclassical transport formulations including quantum corrections for advanced devices with High-K gate stacks
Abstract\u2014Long\u2013channel effective mobilities as well as transfer
characteristics of a 32 nm single\u2013gate SOI and a 16 nm double\u2013
gate (DG) MOSFET have been simulated with five different
Monte Carlo (MC) device simulators. The differences are mostly
rather small for the SOI\u2013FET with quantum effects having
a minor effect on threshold voltage due to the lowly doped
channel, while the two multi\u2013subband MC simulators show some
prominent deviations in the case of the DG\u2013FET. High\u2013 mobility
degradation by remote phonon scattering (RPS) in free carrier
MC approximation leads to smaller performance degradation
compared to multi\u2013subband MC with remote Coulomb scattering
(RCS) and RPS, but requires further investigations
Comparison of semiclassical transport formulations including quantum corrections for advanced devices with High-K gate stacks
Comparison of Semiclassical Transport Formulations Including Quantum Corrections for Advanced Devices with High-K Gate Stacks
Long-channel effective mobilities as well as transfer characteristics of a 32 nm single-gate SOI and a 16 nm double-gate (DG) MOSFET have been simulated with live different Monte Carlo (MC) device simulators. The differences are mostly rather small for the SOI-FET with quantum effects having a minor effect on threshold voltage due to the lowly doped channel, while the two multi-subband MC simulators show some prominent deviations in the case of the DG-FET. High-K mobility degradation by remote phonon scattering (RPS) in free carrier MC approximation leads to smaller performance degradation compared to multi-subband MC with remote Coulomb scattering (RCS) and RPS, but requires further investigations
On the LPV control design and its applications to some classes of dynamical systems
In this chapter, a control design approach based on linear parametervarying (LPV) systems, which can be exploited to solve several problems typically encountered in control engineering, is presented. By means of recent techniques based on Youla\u2013Kucera parametrization, it is shown how it is possible not only to design and optimize stabilizing controllers, but also to exploit the structure of the Youla\u2013Kucera parametrized controller to face and solve side problems, including: (a) dealing with nonlinearities; (b) taking into account control input constraints; (c) performing controller commutation or online adaptation, e.g., in the presence of faults; and (d) dealing with delays in the system. The control scheme is observerbased, namely a prestabilizing observer-based precompensator is applied. Consequently, a Youla\u2013Kucera parameter is applied to produce a supplementary input ignition, which is a function of the residual value (the difference between the output and the estimated output). Based on the fact that any stable operator which maps the residual to the supplementary input preserves stability, several additional features can be added to the compensator, without compromising the loop stabilit
