Nanostructure and microstructure fabrication:from desired properties to suitable processes

\u3cp\u3eWhen designing a new nanostructure or microstructure, one can follow a processing-based manufacturing pathway, in which the structure properties are defined based on the processing capabilities of the fabrication method at hand. Alternatively, a performance-based pathway can be followed, where the envisioned performance is first defined, and then suitable fabrication methods are sought. To support the latter pathway, fabrication methods are here reviewed based on the geometric and material complexity, resolution, total size, geometric and material diversity, and throughput they can achieve, independently from processing capabilities. Ten groups of fabrication methods are identified and compared in terms of these seven moderators. The highest resolution is obtained with electron beam lithography, with feature sizes below 5 nm. The highest geometric complexity is attained with vat photopolymerization. For high throughput, parallel methods, such as photolithography (≈10\u3csup\u3e1\u3c/sup\u3e m\u3csup\u3e2\u3c/sup\u3e h\u3csup\u3e−1\u3c/sup\u3e), are needed. This review offers a decision-making tool for identifying which method to use for fabricating a structure with predefined properties.\u3c/p\u3

Realization and control of the lupo EL electric vehicle

\u3cp\u3eDuring fall 2009, the Eindhoven University of Technology started the development of the Lupo EL (Electric Lightweight) research vehicle. The vehicle is fully operational now, allowed to drive on the public road and used in several research projects. This paper will focus more in-depth on the vehicle development and the research performed. The following subjects will be addressed: vehicle realization, specification and performance, data acquisition systems and control systems.\u3c/p\u3

Dynamical Observation of Femtosecond-Laser-Induced Bubbles in Water Using a Single Laser Source for Probing and Sensing

We report on dynamical observations of femtosecond-laser-generated bubbles in water using a single-laser-source pump/probe setup combined with stroboscopic imaging. With this simple setup, we accurately measure the transmission of a probe beam and simultaneously record images giving the size and lifetime of single-pulse-generated bubbles. Our experiments indicate that stable bubble nucleation can be obtained with pulses repetition rate up to 142 kHz, which offers promising perspectives for high-throughput jetting

Flexible thin-film transistors using multistep UV nanoimprint lithography

A multistep imprinting process is presented for the fabrication of a bottom-contact, bottom-gate thin-film transistor (TFT) on poly(ethylene naphthalate) (PEN) foil by patterning all layers of the metal-insulator-metal stack by UV nanoimprint lithography (UV NIL). The flexible TFTs were fabricated on a planarization layer, patterned in a novel way by UV NIL, on a foil reversibly glued to a Si carrier. This planarization step enhances the dimensional stability and flatness of the foil and thus results in a thinner and more homogeneous residual layer. The fabricated TFTs have been electrically characterized as demonstrators of the here developed fully UV NIL-based patterning process on PEN foil, and compared to TFTs made on Si with the same process. TFTs with channel lengths from 5 μm down to 250 nm have been fabricated on Si and PEN foil, showing channel length-dependent charge carrier mobilities, μ, in the range of 0.06-0.92 cm2 V-1 s -1 on Si and of 0.16-0.56 cm2 V-1 s -1 on PEN foil

Multilevel information storage in ferroelectric polymer memories

\u3cp\u3eMultibit memory devices based on the ferroelectric copolymer P(VDF-TrFE) (poly-(vinylidenefluoride-trifluoroethylene)) are presented. Multilevel microstructures are fabricated by thermal imprinting of spin-coated ferroelectric polymer film using a rigid Si template. Multibit storage in capacitors and thin-film transistor memory is realized by implementing imprinted ferroelectric polymer films as the insulator and gate dielectric layers, respectively.\u3c/p\u3

Flexible thin-film transistors using multistep UV nanoimprint lithography

\u3cp\u3eA multistep imprinting process is presented for the fabrication of a bottom-contact, bottom-gate thin-film transistor (TFT) on poly(ethylene naphthalate) (PEN) foil by patterning all layers of the metal-insulator-metal stack by UV nanoimprint lithography (UV NIL). The flexible TFTs were fabricated on a planarization layer, patterned in a novel way by UV NIL, on a foil reversibly glued to a Si carrier. This planarization step enhances the dimensional stability and flatness of the foil and thus results in a thinner and more homogeneous residual layer. The fabricated TFTs have been electrically characterized as demonstrators of the here developed fully UV NIL-based patterning process on PEN foil, and compared to TFTs made on Si with the same process. TFTs with channel lengths from 5 μm down to 250 nm have been fabricated on Si and PEN foil, showing channel length-dependent charge carrier mobilities, μ, in the range of 0.06-0.92 cm\u3csup\u3e2\u3c/sup\u3e V\u3csup\u3e-1\u3c/sup\u3e s \u3csup\u3e-1\u3c/sup\u3e on Si and of 0.16-0.56 cm\u3csup\u3e2\u3c/sup\u3e V\u3csup\u3e-1\u3c/sup\u3e s \u3csup\u3e-1\u3c/sup\u3e on PEN foil.\u3c/p\u3